Re: [Xen-devel] [PATCH v3 0/2] Add support for Xilinx ZynqMP SoC

[Julien Grall <julien.grall@xxxxxxxxxx>]

Hello Edgar,

Thank you for adding support of the ZynqMP.

On 10/03/15 02:49, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xxxxxxxxxx>
> 
> Adds support for the Cadence UART in Xilinx ZynqMP. The
> rest of the ZynqMP platform is discovered via device-tree.

Did you make sure that the default grant table range (0xb0000000 -
0xb0020000) don't overlap with an hardware region?

Regards,

-- 
Julien Grall

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