[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 3/6] X86: improve psr scheduling code
>>> On 13.03.15 at 11:13, <chao.p.peng@xxxxxxxxxxxxxxx> wrote: > @@ -1473,11 +1471,10 @@ static void __context_switch(void) > } > vcpu_restore_fpu_eager(n); > n->arch.ctxt_switch_to(n); > - > - if ( psr_cmt_enabled() && n->domain->arch.psr_rmid > 0 ) > - psr_assoc_rmid(n->domain->arch.psr_rmid); > } > > + psr_ctxt_switch_to(n->domain); But you now potentially do the MSR write despite it already being the needed value (e.g. when switching between an idle vCPU and another one also having RMID zero). Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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