Re: [Xen-devel] [PATCH v4 0/3] Set SMMU s2 input-size based on p2m tables

[Ian Campbell <ian.campbell@xxxxxxxxxx>]

On Fri, 2015-05-01 at 11:40 +1000, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xxxxxxxxxx>
> 
> Hi,
> 
> This is a fix for the issue I'm seeing on ZynqMP with missmatched
> setup of the SMMU and the shared p2m page-tables with the CPU.

Looking back at previous conversations it seems like your SMMU handles
fewer input bits than the second stage of the regular MMU, is that
right?

Is there an architectural constraint that bits(SMMU) <= bits(MMU-s2)?

> 
> This implementes a global p2m_ipa_bits cap for S2 input-size as
> discussed in the previous RFC.
> 
> Best regards,
> Edgar
> 
> Changelog:
> v3 -> v4:
> * Replace ASSERT on supported IPA sizes with returnig error.
> * Remove redundant 'addresses' after IPA.
> 
> v2 -> v3:
> * pfn -> ipa.
> * Fix typos in commit msg for 3/3.
> 
> v1 -> v2:
> * Use a global pfn bitsize instead of a per-domain one.
> 
> Edgar E. Iglesias (3):
>   xen/arm: Re-order iommu_setup to after setup_virt_paging
>   xen/arm: Add p2m_ipa_bits
>   xen/iommu: arm: Use p2m_ipa_bits as stage2 input size
> 
>  xen/arch/arm/p2m.c                 |  5 +++++
>  xen/arch/arm/setup.c               |  4 ++--
>  xen/drivers/passthrough/arm/smmu.c | 10 ++++++++--
>  xen/include/asm-arm/p2m.h          |  3 +++
>  4 files changed, 18 insertions(+), 4 deletions(-)
> 



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