Re: [Xen-devel] [PATCH v4 0/3] Set SMMU s2 input-size based on p2m tables

[Julien Grall <julien.grall@xxxxxxxxxx>]

Hi Ian,

On 05/05/15 14:17, Ian Campbell wrote:
> On Fri, 2015-05-01 at 11:40 +1000, Edgar E. Iglesias wrote:
>> From: "Edgar E. Iglesias" <edgar.iglesias@xxxxxxxxxx>
>>
>> Hi,
>>
>> This is a fix for the issue I'm seeing on ZynqMP with missmatched
>> setup of the SMMU and the shared p2m page-tables with the CPU.
> 
> Looking back at previous conversations it seems like your SMMU handles
> fewer input bits than the second stage of the regular MMU, is that
> right?
> 
> Is there an architectural constraint that bits(SMMU) <= bits(MMU-s2)?

His problem is bits(MMU-s2) <= bits(SMMU).

Although, we were talking about hardware where the bits(SMMU) <=
bits(MMU-s2).

I have Seattle in mind but I haven't yet feedback from Suravee (in CC).

Suravee, do you have any input? Having the bits(SMMU) <= bits(MMU-s2)
would restrict the P2M to use 40 bits. Anything above won't be
accessible to DOM0 because of the 1:1 mapping.

Regards,

-- 
Julien Grall

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