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Re: [Xen-devel] [PATCH v7 02/14] x86: improve psr scheduling code

On Fri, May 08, 2015 at 11:20:45AM +0100, Jan Beulich wrote:
> >>> On 08.05.15 at 10:56, <chao.p.peng@xxxxxxxxxxxxxxx> wrote:
> > Switching RMID from previous vcpu to next vcpu only needs to write
> > MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough,
> > no need to write '0' first. Idle domain has RMID set to 0 and because MSR
> > is already updated lazily, so just switch it as it does.
> > 
> > Also move the initialization of per-CPU variable which used for lazy
> > update from context switch to CPU starting.
> > 
> > Signed-off-by: Chao Peng <chao.p.peng@xxxxxxxxxxxxxxx>
> > Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> > Reviewed-by: Dario Faggioli <dario.faggioli@xxxxxxxxxx>
> Please avoid sending again changes that got applied already.
Just noticed it's already get merged. Sorry for the noise and thanks.

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