Re: [Xen-devel] [PATCHv2 for-4.6] p2m/ept: Work around hardware errata setting A bit

[Wei Liu <wei.liu2@xxxxxxxxxx>]

On Mon, Sep 28, 2015 at 01:39:34PM +0100, Ross Lagerwall wrote:
> Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
> log-dirty"), the A and D bits of EPT paging entries are set
> unconditionally, regardless of whether PML is enabled or not. This
> causes a regression in Xen 4.6 on some processors due to Intel Errata
> AVR41 -- HVM guests get severe memory corruption when the A bit is set
> due to incorrect TLB flushing on mov to cr3. The errata affects the Atom
> C2000 family (Avaton).

Typo here, should be Avoton.

> 
[...]
> @@ -1150,6 +1152,9 @@ int ept_p2m_init(struct p2m_domain *p2m)
>      p2m->memory_type_changed = ept_memory_type_changed;
>      p2m->audit_p2m = NULL;
>  
> +    /* Work around Errata AVR41 on Avaton processors. */

Same here, Avoton.

> +    cpu_has_ept_ad = boot_cpu_data.x86_model != 0x4d;
> +
>      /* Set the memory type used when accessing EPT paging structures. */
>      ept->ept_mt = EPT_DEFAULT_MT;
>  
> -- 
> 2.4.3

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