[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Xen-devel] [PATCH 0/9] xen/arm: Bunch of fixes for the vGIC emulation

Hi all,

The main point of this series is to fix the access to any register when the
user doesn't write at the base offset of the registers.

At the same, I took the opportunity to re-arrange the emulation and dropping
any registers which doesn't exists or not required by the spec.

This series is based on "xen/arm: vgic: Support 32-bit access for 64-bit
register" [1]. I've provided a branch with the 2 series applied:

git://xenbits.xen.org/people/julieng/xen-unstable.git branch gic-emulation-v1

Sincerely yours,

[1] http://lists.xen.org/archives/html/xen-devel/2015-11/msg00782.html

Julien Grall (9):
  xen/arm: vgic-v3: Use the correct offset GICR_IGRPMODR0
  xen/arm: vgic-v3: Only emulate identification registers requested by
    the spec
  xen/arm: vgic: Properly emulate the full register
  xen/arm: vgic-v3: Remove GICR_MOVALLR and GICR_MOVLPIR
  xen/arm: vgic: Re-order the register emulations to match the memory
  xen/arm: vgic-v3: Emulate read to GICD_ICACTIVER<n>
  xen/arm: vgic-v3: Remove spurious return in GICR_INVALLR
  xen/arm: vgic-v3: Don't implement write-only register read as zero
  xen/arm: vgic-v3: Make clear that GICD_*SPI_* registers are reserved

 xen/arch/arm/vgic-v2.c            | 252 +++++++------
 xen/arch/arm/vgic-v3.c            | 720 +++++++++++++++++++++++++-------------
 xen/include/asm-arm/gic_v3_defs.h |  16 +-
 xen/include/asm-arm/vgic-emul.h   |  24 ++
 4 files changed, 654 insertions(+), 358 deletions(-)
 create mode 100644 xen/include/asm-arm/vgic-emul.h


Xen-devel mailing list



Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.