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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v8 04/28] xen/arm: Rename NR_IRQs and vgic_num_irqs helper function
From: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
NR_IRQS represents the number of lines (i.e SGIs, PPIs and SPIs).
With the introduction of LPIs, NR_IRQs is renamed to NR_ITLINES.
Similarly vgic_num_irqs() is renamed as vgic_num_irq_lines().
Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
Reviewed-by: Julien Grall <julien.grall@xxxxxxxxxx>
---
v7: - Renamed NR_LINE_IRQS as NR_ITLINES and vgic_num_line_irqs()
as vgic_num_irq_lines()
---
xen/arch/arm/gic.c | 2 +-
xen/arch/arm/irq.c | 10 +++++-----
xen/arch/arm/vgic-v3.c | 2 +-
xen/arch/arm/vgic.c | 10 +++++-----
xen/include/asm-arm/irq.h | 9 +++++----
xen/include/asm-arm/vgic.h | 2 +-
6 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index 0b3f634..4b46a71 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -140,7 +140,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int
virq,
ASSERT(spin_is_locked(&desc->lock));
/* Caller has already checked that the IRQ is an SPI */
ASSERT(virq >= 32);
- ASSERT(virq < vgic_num_irqs(d));
+ ASSERT(virq < vgic_num_irq_lines(d));
vgic_lock_rank(v_target, rank, flags);
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index d409abb..b722737 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -55,7 +55,7 @@ hw_irq_controller no_irq_type = {
.end = end_none
};
-static irq_desc_t irq_desc[NR_IRQS];
+static irq_desc_t irq_desc[NR_ITLINES];
static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc);
irq_desc_t *__irq_to_desc(int irq)
@@ -75,7 +75,7 @@ static int __init init_irq_data(void)
{
int irq;
- for (irq = NR_LOCAL_IRQS; irq < NR_IRQS; irq++) {
+ for (irq = NR_LOCAL_IRQS; irq < NR_ITLINES; irq++) {
struct irq_desc *desc = irq_to_desc(irq);
init_one_irq_desc(desc);
desc->irq = irq;
@@ -407,11 +407,11 @@ int route_irq_to_guest(struct domain *d, unsigned int
virq,
unsigned long flags;
int retval = 0;
- if ( virq >= vgic_num_irqs(d) )
+ if ( virq >= vgic_num_irq_lines(d) )
{
printk(XENLOG_G_ERR
"the vIRQ number %u is too high for domain %u (max = %u)\n",
- irq, d->domain_id, vgic_num_irqs(d));
+ irq, d->domain_id, vgic_num_irq_lines(d));
return -EINVAL;
}
@@ -523,7 +523,7 @@ int release_guest_irq(struct domain *d, unsigned int virq)
int ret;
/* Only SPIs are supported */
- if ( virq < NR_LOCAL_IRQS || virq >= vgic_num_irqs(d) )
+ if ( virq < NR_LOCAL_IRQS || virq >= vgic_num_irq_lines(d) )
return -EINVAL;
p = spi_to_pending(d, virq);
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index dba2449..70cf67e 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -909,7 +909,7 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v,
mmio_info_t *info,
* Number of interrupt identifier bits supported by the GIC
* Stream Protocol Interface
*/
- unsigned int irq_bits = get_count_order(vgic_num_irqs(v->domain));
+ unsigned int irq_bits = get_count_order(vgic_num_irq_lines(v->domain));
/*
* Number of processors that may be used as interrupt targets when ARE
* bit is zero. The maximum is 8.
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index ee35683..8cb3b06 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -143,7 +143,7 @@ int domain_vgic_init(struct domain *d, unsigned int nr_spis)
return ret;
d->arch.vgic.allocated_irqs =
- xzalloc_array(unsigned long, BITS_TO_LONGS(vgic_num_irqs(d)));
+ xzalloc_array(unsigned long, BITS_TO_LONGS(vgic_num_irq_lines(d)));
if ( !d->arch.vgic.allocated_irqs )
return -ENOMEM;
@@ -299,7 +299,7 @@ void arch_move_irqs(struct vcpu *v)
struct vcpu *v_target;
int i;
- for ( i = 32; i < vgic_num_irqs(d); i++ )
+ for ( i = 32; i < vgic_num_irq_lines(d); i++ )
{
v_target = vgic_get_target_vcpu(v, i);
p = irq_to_pending(v_target, i);
@@ -505,7 +505,7 @@ void vgic_vcpu_inject_spi(struct domain *d, unsigned int
virq)
struct vcpu *v;
/* the IRQ needs to be an SPI */
- ASSERT(virq >= 32 && virq <= vgic_num_irqs(d));
+ ASSERT(virq >= 32 && virq <= vgic_num_irq_lines(d));
v = vgic_get_target_vcpu(d->vcpu[0], virq);
vgic_vcpu_inject_irq(v, virq);
@@ -527,7 +527,7 @@ int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
bool_t vgic_reserve_virq(struct domain *d, unsigned int virq)
{
- if ( virq >= vgic_num_irqs(d) )
+ if ( virq >= vgic_num_irq_lines(d) )
return 0;
return !test_and_set_bit(virq, d->arch.vgic.allocated_irqs);
@@ -547,7 +547,7 @@ int vgic_allocate_virq(struct domain *d, bool_t spi)
else
{
first = 32;
- end = vgic_num_irqs(d);
+ end = vgic_num_irq_lines(d);
}
/*
diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h
index f33c331..9be83b4 100644
--- a/xen/include/asm-arm/irq.h
+++ b/xen/include/asm-arm/irq.h
@@ -19,11 +19,12 @@ struct arch_irq_desc {
};
#define NR_LOCAL_IRQS 32
-#define NR_IRQS 1024
+/* Number of SGIs + PPIs + SPIs */
+#define NR_ITLINES 1024
-#define nr_irqs NR_IRQS
-#define nr_static_irqs NR_IRQS
-#define arch_hwdom_irqs(domid) NR_IRQS
+#define nr_irqs NR_ITLINES
+#define nr_static_irqs NR_ITLINES
+#define arch_hwdom_irqs(domid) NR_ITLINES
struct irq_desc;
struct irqaction;
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index a2fccc0..e9ec764 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -285,7 +285,7 @@ enum gic_sgi_mode;
*/
#define REG_RANK_INDEX(b, n, s) ((((n) >> s) & ((b)-1)) % 32)
-#define vgic_num_irqs(d) ((d)->arch.vgic.nr_spis + 32)
+#define vgic_num_irq_lines(d) ((d)->arch.vgic.nr_spis + 32)
extern int domain_vgic_init(struct domain *d, unsigned int nr_spis);
extern void domain_vgic_free(struct domain *d);
--
1.7.9.5
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