[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2 0/8] Map Xen code/data/bss with superpages
And make use of NX and RO attributes wherever possible. After this series, the pagetable layout looks like: (XEN) *** Dumping Xen text/data/bss mappings from ffff82d080000000 (XEN) cr3 0000000826484000, idle_pg_table ffff82d080818000, pa 00000000ac018000 (XEN) l2_xenmap: ffff82d080814000, pa 00000000ac014000 (XEN) L4[261] = 00000000ac017163 X Gl S RW P (XEN) L3[322] = 00000000ac014163 X Gl S RW P (XEN) L2[000] = 00000000ab8001e1 X Gl + S RO P <- .text (XEN) L2[001] = 00000000aba001a1 X Gl + S RO P <- .text (XEN) L2[002] = 80000000abc001a1 NX Gl + S RO P <- .rodata <- discarded .init (XEN) L2[004] = 80000000ac0001e3 NX Gl + S RW P <- .data and .bss (XEN) L2[511] = 000000084dcc7063 X S RW P <- stubs Andrew Cooper (8): xen/lockprof: Move .lockprofile.data into .rodata xen/x86: Improvements to build-time pagetable generation xen/x86: Construct the {l2,l3}_bootmap at compile time xen/memguard: Drop memguard_init() entirely xen/x86: Disable CR0.WP while applying alternatives xen/x86: Reorder .data and .init when linking xen/x86: Use 2M superpages for text/data/bss mappings xen/x86: Unilaterally remove .init mappings xen/arch/arm/xen.lds.S | 14 +++---- xen/arch/x86/alternative.c | 7 ++++ xen/arch/x86/boot/head.S | 18 +++----- xen/arch/x86/boot/x86_64.S | 64 ++++++++++++++++++++-------- xen/arch/x86/mm.c | 16 ------- xen/arch/x86/setup.c | 64 ++++++++++++++++++++-------- xen/arch/x86/x86_64/mm.c | 4 -- xen/arch/x86/xen.lds.S | 102 +++++++++++++++++++++++++++++---------------- xen/include/asm-arm/mm.h | 1 - xen/include/asm-x86/mm.h | 2 - xen/include/xen/kernel.h | 7 ++++ xen/include/xen/spinlock.h | 2 +- 12 files changed, 186 insertions(+), 115 deletions(-) -- 2.1.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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