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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v6 4/5] vmx: Add VMX RDTSC(P) scaling support
This patch adds the initialization and setup code for VMX TSC scaling.
Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx>
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
Acked-by: Kevin Tian <kevin.tian@xxxxxxxxx>
---
CC: Keir Fraser <keir@xxxxxxx>
CC: Jan Beulich <jbeulich@xxxxxxxx>
CC: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CC: Jun Nakajima <jun.nakajima@xxxxxxxxx>
CC: Kevin Tian <kevin.tian@xxxxxxxxx>
---
Changes in v6:
* Adapt to the macro renaming in patch 1.
* No functionality changes.
---
xen/arch/x86/hvm/hvm.c | 6 ++++++
xen/arch/x86/hvm/vmx/vmcs.c | 12 +++++++++---
xen/arch/x86/hvm/vmx/vmx.c | 17 +++++++++++++++++
xen/include/asm-x86/hvm/hvm.h | 3 +++
xen/include/asm-x86/hvm/vmx/vmcs.h | 7 +++++++
5 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 50e5a5c..9059bbc 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2123,6 +2123,9 @@ static int hvm_load_cpu_ctxt(struct domain *d,
hvm_domain_context_t *h)
if ( hvm_funcs.load_cpu_ctxt(v, &ctxt) < 0 )
return -EINVAL;
+ if ( hvm_funcs.tsc_scaling.setup )
+ hvm_funcs.tsc_scaling.setup(v);
+
v->arch.hvm_vcpu.msr_tsc_aux = ctxt.msr_tsc_aux;
hvm_set_guest_tsc_fixed(v, ctxt.tsc, d->arch.hvm_domain.sync_tsc);
@@ -5638,6 +5641,9 @@ void hvm_vcpu_reset_state(struct vcpu *v, uint16_t cs,
uint16_t ip)
hvm_set_segment_register(v, x86_seg_gdtr, ®);
hvm_set_segment_register(v, x86_seg_idtr, ®);
+ if ( hvm_funcs.tsc_scaling.setup )
+ hvm_funcs.tsc_scaling.setup(v);
+
/* Sync AP's TSC with BSP's. */
v->arch.hvm_vcpu.cache_tsc_offset =
v->domain->vcpu[0]->arch.hvm_vcpu.cache_tsc_offset;
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index 5bc3c74..d506f80 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -149,6 +149,7 @@ static void __init vmx_display_features(void)
P(cpu_has_vmx_vmfunc, "VM Functions");
P(cpu_has_vmx_virt_exceptions, "Virtualisation Exceptions");
P(cpu_has_vmx_pml, "Page Modification Logging");
+ P(cpu_has_vmx_tsc_scaling, "TSC Scaling");
#undef P
if ( !printed )
@@ -243,7 +244,8 @@ static int vmx_init_vmcs_config(void)
SECONDARY_EXEC_ENABLE_VM_FUNCTIONS |
SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS |
SECONDARY_EXEC_XSAVES |
- SECONDARY_EXEC_PCOMMIT);
+ SECONDARY_EXEC_PCOMMIT |
+ SECONDARY_EXEC_TSC_SCALING);
rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
if ( _vmx_misc_cap & VMX_MISC_VMWRITE_ALL )
opt |= SECONDARY_EXEC_ENABLE_VMCS_SHADOWING;
@@ -1000,7 +1002,7 @@ static int construct_vmcs(struct vcpu *v)
__vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_pin_based_exec_control);
v->arch.hvm_vmx.exec_control = vmx_cpu_based_exec_control;
- if ( d->arch.vtsc )
+ if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling )
v->arch.hvm_vmx.exec_control |= CPU_BASED_RDTSC_EXITING;
v->arch.hvm_vmx.secondary_exec_control = vmx_secondary_exec_control;
@@ -1288,6 +1290,9 @@ static int construct_vmcs(struct vcpu *v)
if ( cpu_has_vmx_xsaves )
__vmwrite(XSS_EXIT_BITMAP, 0);
+ if ( cpu_has_vmx_tsc_scaling )
+ __vmwrite(TSC_MULTIPLIER, d->arch.hvm_domain.tsc_scaling_ratio);
+
vmx_vmcs_exit(v);
/* PVH: paging mode is updated by arch_set_info_guest(). */
@@ -1870,7 +1875,8 @@ void vmcs_dump_vcpu(struct vcpu *v)
vmr32(VM_EXIT_REASON), vmr(EXIT_QUALIFICATION));
printk("IDTVectoring: info=%08x errcode=%08x\n",
vmr32(IDT_VECTORING_INFO), vmr32(IDT_VECTORING_ERROR_CODE));
- printk("TSC Offset = 0x%016lx\n", vmr(TSC_OFFSET));
+ printk("TSC Offset = 0x%016lx TSC Multiplier = 0x%016lx\n",
+ vmr(TSC_OFFSET), vmr(TSC_MULTIPLIER));
if ( (v->arch.hvm_vmx.exec_control & CPU_BASED_TPR_SHADOW) ||
(vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) )
printk("TPR Threshold = 0x%02x PostedIntrVec = 0x%02x\n",
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index b949d9c..a201b74 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -1122,6 +1122,16 @@ static void vmx_handle_cd(struct vcpu *v, unsigned long
value)
}
}
+static void vmx_setup_tsc_scaling(struct vcpu *v)
+{
+ if ( !hvm_tsc_scaling_supported || v->domain->arch.vtsc )
+ return;
+
+ vmx_vmcs_enter(v);
+ __vmwrite(TSC_MULTIPLIER, hvm_tsc_scaling_ratio(v->domain));
+ vmx_vmcs_exit(v);
+}
+
static void vmx_set_tsc_offset(struct vcpu *v, u64 offset, u64 at_tsc)
{
vmx_vmcs_enter(v);
@@ -2016,6 +2026,10 @@ static struct hvm_function_table __initdata
vmx_function_table = {
.altp2m_vcpu_update_vmfunc_ve = vmx_vcpu_update_vmfunc_ve,
.altp2m_vcpu_emulate_ve = vmx_vcpu_emulate_ve,
.altp2m_vcpu_emulate_vmfunc = vmx_vcpu_emulate_vmfunc,
+ .tsc_scaling = {
+ .max_ratio = VMX_TSC_MULTIPLIER_MAX,
+ .setup = vmx_setup_tsc_scaling,
+ },
};
/* Handle VT-d posted-interrupt when VCPU is running. */
@@ -2120,6 +2134,9 @@ const struct hvm_function_table * __init start_vmx(void)
&& cpu_has_vmx_secondary_exec_control )
vmx_function_table.pvh_supported = 1;
+ if ( cpu_has_vmx_tsc_scaling )
+ vmx_function_table.tsc_scaling.ratio_frac_bits = 48;
+
setup_vmcs_dump();
return &vmx_function_table;
diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h
index c5c9328..12209d5 100644
--- a/xen/include/asm-x86/hvm/hvm.h
+++ b/xen/include/asm-x86/hvm/hvm.h
@@ -231,6 +231,9 @@ struct hvm_function_table {
uint8_t ratio_frac_bits;
/* maximum-allowed TSC scaling ratio */
uint64_t max_ratio;
+
+ /* Architecture function to setup TSC scaling ratio */
+ void (*setup)(struct vcpu *v);
} tsc_scaling;
};
diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h
b/xen/include/asm-x86/hvm/vmx/vmcs.h
index a5e7aee..0d7c6d2 100644
--- a/xen/include/asm-x86/hvm/vmx/vmcs.h
+++ b/xen/include/asm-x86/hvm/vmx/vmcs.h
@@ -237,6 +237,7 @@ extern u32 vmx_vmentry_control;
#define SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS 0x00040000
#define SECONDARY_EXEC_XSAVES 0x00100000
#define SECONDARY_EXEC_PCOMMIT 0x00200000
+#define SECONDARY_EXEC_TSC_SCALING 0x02000000
extern u32 vmx_secondary_exec_control;
#define VMX_EPT_EXEC_ONLY_SUPPORTED 0x00000001
@@ -259,6 +260,8 @@ extern u64 vmx_ept_vpid_cap;
#define VMX_MISC_CR3_TARGET 0x01ff0000
#define VMX_MISC_VMWRITE_ALL 0x20000000
+#define VMX_TSC_MULTIPLIER_MAX 0xffffffffffffffffULL
+
#define cpu_has_wbinvd_exiting \
(vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING)
#define cpu_has_vmx_virtualize_apic_accesses \
@@ -306,6 +309,9 @@ extern u64 vmx_ept_vpid_cap;
(vmx_secondary_exec_control & SECONDARY_EXEC_XSAVES)
#define cpu_has_vmx_pcommit \
(vmx_secondary_exec_control & SECONDARY_EXEC_PCOMMIT)
+#define cpu_has_vmx_tsc_scaling \
+ (vmx_secondary_exec_control & SECONDARY_EXEC_TSC_SCALING)
+
#define VMCS_RID_TYPE_MASK 0x80000000
/* GUEST_INTERRUPTIBILITY_INFO flags. */
@@ -380,6 +386,7 @@ enum vmcs_field {
VMWRITE_BITMAP = 0x00002028,
VIRT_EXCEPTION_INFO = 0x0000202a,
XSS_EXIT_BITMAP = 0x0000202c,
+ TSC_MULTIPLIER = 0x00002032,
GUEST_PHYSICAL_ADDRESS = 0x00002400,
VMCS_LINK_POINTER = 0x00002800,
GUEST_IA32_DEBUGCTL = 0x00002802,
--
2.7.2
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