Re: [Xen-devel] HVMlite gains

[Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>]

On Tue, Mar 15, 2016 at 02:14:15PM -0700, Luis R. Rodriguez wrote:
> While discussing HVMLite with a few people a few questions have come
> up. Since I only really understand a few possible gains with the
> current design I wanted to get clarificaiton on a few which I simply

Just think of baremetal without BIOS. Without PCI support (unless
needed).

> have no clue if we stand to gain from them, or if its on the roadmap:
> 
>   a) Will context switches use the actual CR3 register?

Yes.
>   b) Will IOPL live in the actual FLAGS register?

Yes.
>   c) Will guest-usable CPU features should show up in CPUID, and will
> features that shouldn't be used should *not* show up in CPUID. For

Correct.
> instance currently you happen to boot Xen 4.4.0 with a new Linux dom0
> on a CPU that supports MPX what will happen? What about with HVMlite?

It should boot just normally. Either PV dom0 guest or HVMLite dom0
guest (whenever that is operational).


>   d)  Will acking an interrupt use the standard APIC mechanism?  Do
> any of the current Xen variants do that?

Yes and no. It is disabled right now but it will be enabled as I want
to make sure we can use vAPIC in the guest.

You don't want to use emulated APIC mechanism as it incurs VMEXITs.

>   e) Can timing use RDTSC?

Yes (odd question? You could always use rdtsc). 
> 
>  Luis

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