[Xen-devel] HVMlite gains

["Luis R. Rodriguez" <mcgrof@xxxxxxxxxx>]

While discussing HVMLite with a few people a few questions have come
up. Since I only really understand a few possible gains with the
current design I wanted to get clarificaiton on a few which I simply
have no clue if we stand to gain from them, or if its on the roadmap:

  a) Will context switches use the actual CR3 register?
  b) Will IOPL live in the actual FLAGS register?
  c) Will guest-usable CPU features should show up in CPUID, and will
features that shouldn't be used should *not* show up in CPUID. For
instance currently you happen to boot Xen 4.4.0 with a new Linux dom0
on a CPU that supports MPX what will happen? What about with HVMlite?
  d)  Will acking an interrupt use the standard APIC mechanism?  Do
any of the current Xen variants do that?
  e) Can timing use RDTSC?

 Luis

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