[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH v3 16/28] x86/cpu: Rework AMD masking MSR setup



On 21/03/16 16:51, Jan Beulich wrote:
>>>> On 15.03.16 at 16:35, <andrew.cooper3@xxxxxxxxxx> wrote:
>> +            /* Fast-forward bits - Must be set. */
>> +            if (ecx & cpufeat_mask(X86_FEATURE_XSAVE))
>> +                    ecx |= cpufeat_mask(X86_FEATURE_OSXSAVE);
> Wouldn't you think it would be better to also handle PKU/OSPKE
> here, just in case AMD decides to implement this? Because if they
> do, we will expose the feature no matter that this code is not
> ready for it.
>
> Either way,
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>

OSPKE is in ecx.

The AMD mask registers cover eax and ebx.

~Andrew

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.