[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [for-4.7 1/2] xen/bitops: Introduce macros to generate mask
>>> Julien Grall <julien.grall@xxxxxxx> 04/14/16 10:55 AM >>> >On 14/04/2016 05:01, Jan Beulich wrote: >>>>> Julien Grall <julien.grall@xxxxxxx> 04/13/16 6:01 PM >>> >>> --- a/xen/include/xen/bitops.h >>> +++ b/xen/include/xen/bitops.h >>> @@ -3,6 +3,17 @@ >> >#include <asm/types.h> >> > >> >/* >>> + * Create a contiguous bitmask starting at bit position @l and ending at >>> + * position @h. For example >>> + * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000. >>> + */ >>> +#define GENMASK(h, l) \ >>> + (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) >>> + >>> +#define GENMASK_ULL(h, l) \ >>> + (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h)))) >> >> Irrespective of Linux perhaps considering them useful, I'm not sure they >> are (and ISTR these macros having got proposed before). > >This is useful on ARM to generate mask for register. For instance, the >following patch introduces mask for the register HPFAR_EL2. Only the >bits [4:39] are usable, the rest are RES0. > >For ARM, RES0 means the bit is currently read as zero but the software >should not rely on it to preserve forward compatibility. So we want to >mask those bits to avoid breakage with new version of the architecture. All understood and needed on every kind of architecture. Yet what's wrong with expressing this is as 0xfffffffff0, as is being done most everywhere else? Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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