Re: [Xen-devel] [PATCH V3 04/10] arm/gic-v3: Parse per-cpu redistributor entry in GICC subtable

[Shanker Donthineni <shankerd@xxxxxxxxxxxxxx>]

On 06/28/2016 08:51 AM, Shanker Donthineni wrote:
> Hi Julien,
>
>
> On 06/28/2016 05:40 AM, Julien Grall wrote:
> > Hello Shanker,
> >
> > On 27/06/16 21:33, Shanker Donthineni wrote:
> > > @@ -1397,6 +1408,36 @@ gic_acpi_parse_madt_distributor(struct
> > acpi_subtable_header *header,
> > >   }
> > >
> > >   static int __init
> > > +gic_acpi_parse_cpu_redistributor(struct acpi_subtable_header *header,
> > > +                                 const unsigned long end)
> > > +{
> > > +    struct acpi_madt_generic_interrupt *processor;
> > > +    u32 size;
> > > +
> > > +    processor = (struct acpi_madt_generic_interrupt *)header;
> > > +    if ( !(processor->flags & ACPI_MADT_ENABLED) )
> > > +        return 0;
> > You did not answer to my question on previous version of this patch. 
> > You said that "Disabled GICC entries should be skipped because its 
> > Redistributor region is not always-on power domain." However from my 
> > understanding, an usable CPU may have his Redistributor in the not 
> > always-on power domain. So the issue would the same, correct?
> The gicv3_populate_rdist() is not supposed to read GICR registers if 
> the  the associated hardware GICR block is in power-off state. The CPU 
> accesses to disabled GICR region leads to either a system hang or an 
> unexpected behavior.
The description of flag ACPI_MADT_ENABLED in ACPI-6.1 says "If zero, 
this processor in unusable, and the operating system support will not 
attempt to use it".

> > Regards,
--
Shanker Donthineni
Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux 
Foundation Collaborative Project


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