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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [xen-4.7-testing test] 100770: regressions - trouble: blocked/broken/fail/pass
flight 100770 xen-4.7-testing real [real] http://logs.test-lab.xenproject.org/osstest/logs/100770/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-armhf-armhf-libvirt 3 host-install(3) broken REGR. vs. 100635 test-amd64-amd64-i386-pvgrub 9 debian-di-install fail REGR. vs. 100635 test-amd64-amd64-qemuu-nested-intel 12 xen-install/l1 fail REGR. vs. 100635 test-amd64-i386-xl-qemut-debianhvm-amd64 15 guest-localmigrate/x10 fail REGR. vs. 100635 test-amd64-i386-qemuu-rhel6hvm-amd 11 guest-start/redhat.repeat fail REGR. vs. 100635 test-amd64-i386-xl-qemut-winxpsp3 15 guest-localmigrate/x10 fail REGR. vs. 100635 test-amd64-i386-xl-raw 18 guest-start/debian.repeat fail REGR. vs. 100635 Regressions which are regarded as allowable (not blocking): test-amd64-i386-xl-qemut-win7-amd64 16 guest-stop fail like 100635 test-amd64-i386-xl-qemuu-win7-amd64 16 guest-stop fail like 100635 test-amd64-amd64-xl-rtds 9 debian-install fail like 100635 Tests which did not succeed, but are not blocking: test-amd64-amd64-rumprun-amd64 1 build-check(1) blocked n/a test-amd64-i386-rumprun-i386 1 build-check(1) blocked n/a build-i386-rumprun 5 rumprun-build fail never pass build-amd64-rumprun 5 rumprun-build fail never pass test-amd64-amd64-xl-pvh-intel 11 guest-start fail never pass test-amd64-amd64-libvirt 12 migrate-support-check fail never pass test-amd64-amd64-libvirt-xsm 12 migrate-support-check fail never pass test-amd64-amd64-xl-pvh-amd 11 guest-start fail never pass test-amd64-i386-libvirt-xsm 12 migrate-support-check fail never pass test-amd64-i386-libvirt 12 migrate-support-check fail never pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-amd64-amd64-libvirt-vhd 11 migrate-support-check fail never pass test-armhf-armhf-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-libvirt-xsm 14 guest-saverestore fail never pass test-armhf-armhf-xl-arndale 12 migrate-support-check fail never pass test-armhf-armhf-xl-arndale 13 saverestore-support-check fail never pass test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2 fail never pass test-armhf-armhf-xl 12 migrate-support-check fail never pass test-armhf-armhf-xl 13 saverestore-support-check fail never pass test-armhf-armhf-xl-credit2 12 migrate-support-check fail never pass test-armhf-armhf-xl-multivcpu 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 13 saverestore-support-check fail never pass test-armhf-armhf-xl-multivcpu 13 saverestore-support-check fail never pass test-armhf-armhf-xl-cubietruck 12 migrate-support-check fail never pass test-armhf-armhf-xl-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-cubietruck 13 saverestore-support-check fail never pass test-armhf-armhf-xl-xsm 13 saverestore-support-check fail never pass test-amd64-amd64-xl-qemut-win7-amd64 16 guest-stop fail never pass test-armhf-armhf-libvirt-qcow2 11 migrate-support-check fail never pass test-armhf-armhf-libvirt-qcow2 13 guest-saverestore fail never pass test-armhf-armhf-libvirt-raw 11 migrate-support-check fail never pass test-armhf-armhf-libvirt-raw 13 guest-saverestore fail never pass test-armhf-armhf-xl-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 12 saverestore-support-check fail never pass test-armhf-armhf-xl-rtds 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 13 saverestore-support-check fail never pass version targeted for testing: xen dbeb5da648b146339ec49375f2759263fe7ccdc2 baseline version: xen 80bc4350bbd13b6c34371f4ff8b8199674906df6 Last test of basis 100635 2016-08-26 14:15:15 Z 11 days Testing same since 100770 2016-09-06 13:09:07 Z 0 days 1 attempts ------------------------------------------------------------ People who touched revisions under test: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Dario Faggioli <dario.faggioli@xxxxxxxxxx> Feng Wu <feng.wu@xxxxxxxxx> Jan Beulich <jbeulich@xxxxxxxx> Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx> Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx> jobs: build-amd64-xsm pass build-armhf-xsm pass build-i386-xsm pass build-amd64 pass build-armhf pass build-i386 pass build-amd64-libvirt pass build-armhf-libvirt pass build-i386-libvirt pass build-amd64-prev pass build-i386-prev pass build-amd64-pvops pass build-armhf-pvops pass build-i386-pvops pass build-amd64-rumprun fail build-i386-rumprun fail test-amd64-amd64-xl pass test-armhf-armhf-xl pass test-amd64-i386-xl pass test-amd64-amd64-xl-qemut-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemut-stubdom-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-stubdom-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-xsm pass test-armhf-armhf-libvirt-xsm fail test-amd64-i386-libvirt-xsm pass test-amd64-amd64-xl-xsm pass test-armhf-armhf-xl-xsm pass test-amd64-i386-xl-xsm pass test-amd64-amd64-qemuu-nested-amd fail test-amd64-amd64-xl-pvh-amd fail test-amd64-i386-qemut-rhel6hvm-amd pass test-amd64-i386-qemuu-rhel6hvm-amd fail test-amd64-amd64-xl-qemut-debianhvm-amd64 pass test-amd64-i386-xl-qemut-debianhvm-amd64 fail test-amd64-amd64-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-freebsd10-amd64 pass test-amd64-amd64-xl-qemuu-ovmf-amd64 pass test-amd64-i386-xl-qemuu-ovmf-amd64 pass test-amd64-amd64-rumprun-amd64 blocked test-amd64-amd64-xl-qemut-win7-amd64 fail test-amd64-i386-xl-qemut-win7-amd64 fail test-amd64-amd64-xl-qemuu-win7-amd64 pass test-amd64-i386-xl-qemuu-win7-amd64 fail test-armhf-armhf-xl-arndale pass test-amd64-amd64-xl-credit2 pass test-armhf-armhf-xl-credit2 pass test-armhf-armhf-xl-cubietruck pass test-amd64-i386-freebsd10-i386 pass test-amd64-i386-rumprun-i386 blocked test-amd64-amd64-qemuu-nested-intel fail test-amd64-amd64-xl-pvh-intel fail test-amd64-i386-qemut-rhel6hvm-intel pass test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-amd64-libvirt pass test-armhf-armhf-libvirt broken test-amd64-i386-libvirt pass test-amd64-amd64-migrupgrade pass test-amd64-i386-migrupgrade pass test-amd64-amd64-xl-multivcpu pass test-armhf-armhf-xl-multivcpu pass test-amd64-amd64-pair pass test-amd64-i386-pair pass test-amd64-amd64-libvirt-pair pass test-amd64-i386-libvirt-pair pass test-amd64-amd64-amd64-pvgrub pass test-amd64-amd64-i386-pvgrub fail test-amd64-amd64-pygrub pass test-armhf-armhf-libvirt-qcow2 fail test-amd64-amd64-xl-qcow2 pass test-armhf-armhf-libvirt-raw fail test-amd64-i386-xl-raw fail test-amd64-amd64-xl-rtds fail test-armhf-armhf-xl-rtds pass test-amd64-i386-xl-qemut-winxpsp3-vcpus1 pass test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 pass test-amd64-amd64-libvirt-vhd pass test-armhf-armhf-xl-vhd pass test-amd64-amd64-xl-qemut-winxpsp3 pass test-amd64-i386-xl-qemut-winxpsp3 fail test-amd64-amd64-xl-qemuu-winxpsp3 pass test-amd64-i386-xl-qemuu-winxpsp3 pass ------------------------------------------------------------ sg-report-flight on osstest.test-lab.xenproject.org logs: /home/logs/logs images: /home/logs/images Logs, config files, etc. are available at http://logs.test-lab.xenproject.org/osstest/logs Explanation of these reports, and of osstest in general, is at http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master Test harness code can be found at http://xenbits.xen.org/gitweb?p=osstest.git;a=summary broken-step test-armhf-armhf-libvirt host-install(3) Not pushing. ------------------------------------------------------------ commit dbeb5da648b146339ec49375f2759263fe7ccdc2 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Sep 6 11:44:24 2016 +0200 memory: fix compat handling of XENMEM_access_op Within compat_memory_op() this needs to be placed in the first switch() statement, or it ends up being dead code (as that first switch() has a default case chaining to compat_arch_memory_op()). Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Tested-by: Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> master commit: 8d6af808a7e9d9ae1d129e1e5a0def7f8b2333ee master date: 2016-09-02 14:19:51 +0200 commit 9d2ede8018e6776b3f8e9b51611e2663316710de Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Sep 6 11:44:00 2016 +0200 x86/PV: make PMU MSR handling consistent So far accesses to Intel MSRs on an AMD system fall through to the default case, while accesses to AMD MSRs on an Intel system bail (in the RDMSR case without updating EAX and EDX). Make the "AMD MSRs on Intel" case match the "Intel MSR on AMD" one. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> master commit: bea64b3ed25864b90a41e1ca6eeb5a58895bb751 master date: 2016-09-02 14:19:29 +0200 commit ba1f4a4e7420c3d9e9c2834b2cb2e4c1a068915c Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Sep 6 11:43:33 2016 +0200 x86: correct PT_NOTE file position Program and section headers disagreed about the file offset at which the build ID note lives. Reported-by: Sylvain Munaut <s.munaut@xxxxxxxxxxxxxxxxxxxx> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> master commit: f8f185dc4359a1cd8e7896dfbcacb54b473436c8 master date: 2016-09-02 14:18:52 +0200 commit 4f610f2beb9c3cdcd3f21b67c2b53cfde3b3c454 Author: Dario Faggioli <dario.faggioli@xxxxxxxxxx> Date: Tue Sep 6 11:43:09 2016 +0200 credit1: fix a race when picking initial pCPU for a vCPU In the Credit1 hunk of 9f358ddd69463 ("xen: Have schedulers revise initial placement") csched_cpu_pick() is called without taking the runqueue lock of the (temporary) pCPU that the vCPU has been assigned to (e.g., in XEN_DOMCTL_max_vcpus). However, although 'hidden' in the IS_RUNQ_IDLE() macro, that function does access the runq (for doing load balancing calculations). Two scenarios are possible: 1) we are on cpu X, and IS_RUNQ_IDLE() peeks at cpu's X own runq; 2) we are on cpu X, but IS_RUNQ_IDLE() peeks at some other cpu's runq. Scenario 2) absolutely requies that the appropriate runq lock is taken. Scenario 1) works even without taking the cpu's own runq lock. That is actually what happens when when _csched_pick_cpu() is called from csched_vcpu_acct() (in turn, called by csched_tick()). Races have been observed and reported (by both XenServer own testing and OSSTest [1]), in the form of IS_RUNQ_IDLE() falling over LIST_POISON, because we're not currently holding the proper lock, in csched_vcpu_insert(), when scenario 1) occurs. However, for better robustness, from now on we always ask for the proper runq lock to be held when calling IS_RUNQ_IDLE() (which is also becoming a static inline function instead of macro). In order to comply with that, we take the lock around the call to _csched_cpu_pick() in csched_vcpu_acct(). [1] https://lists.xen.org/archives/html/xen-devel/2016-08/msg02144.html Reported-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Signed-off-by: Dario Faggioli <dario.faggioli@xxxxxxxxxx> Reviewed-by: George Dunlap <george.dunlap@xxxxxxxxxx> master commit: 9109bf55084398c4547b8956906410c158eb9a17 master date: 2016-09-02 14:17:55 +0200 commit 7743e91b9dc927ab1c573167af67d5dfd71036db Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Sep 6 11:42:38 2016 +0200 x86/32on64: misc adjustments to call gate emulation - There's no 32-bit displacement in 16-bit addressing mode. - It is wrong to ASSERT() anything on parts of an instruction fetched from guest memory. - The two scaling bits of a SIB byte don't affect whether there is a scaled index register or not. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> master commit: ee1cc4bfdca84d526805c4c72302c026f5e9cd94 master date: 2016-09-01 15:23:46 +0200 commit 93429d20085d76b6190d81b192489dbf6c366473 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Tue Sep 6 11:42:12 2016 +0200 x86/levelling: Provide architectural OSXSAVE handling to masked native CPUID Contrary to c/s b2507fe7 "x86/domctl: Update PV domain cpumasks when setting cpuid policy", Intel CPUID masks are applied after fast forwarding hardware state, rather than before. (All behaviour in this regard appears completely undocumented by both Intel and AMD). Therefore, a set bit in the MSR causes hardware to be fast-forwarded, while a clear bit forces the guests view to 0, even if Xen's CR4.OSXSAVE is actually set. This allows Xen to provide an architectural view of a guest kernels CR4.OSXSAVE setting to any native CPUID instruction issused by guest kernel or userspace, even when masking is used. The masking value defaults to 1 (if the guest has XSAVE available) to cause fast-forwarding to occur for the HVM and idle vcpus. When setting the MSRs, a PV guest kernel's choice of OXSAVE is taken into account, and clobbered from the MSR if not set. This causes the fast-forwarding of Xen's CR4 state not to happen. As a side effect however, levelling potentially need updating on all PV CR4 changes. Reported-by: Jan Beulich <JBeulich@xxxxxxxx> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> x86/levelling: fix breakage on older Intel boxes from c/s 08e7738 cpufeat_mask() yields an unsigned integer constant. As a result, taking its complement causes zero extention rather than sign extention. The result is that, when a guest OS has OXSAVE disabled, all features in 1d are hidden from native CPUID. Amongst other things, this causes the early code in Linux to find no LAPIC, but for everything to appear fine later when userspace is up and running. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Tested-by: Jan Beulich <jbeulich@xxxxxxxx> master commit: 08e7738ec3644350fbac0325085baac6b3c7cd11 master date: 2016-09-01 11:41:07 +0100 master commit: 1461504ce3c414fc5dc717ce16f039d0742b455a master date: 2016-09-02 08:12:29 +0200 commit b80d7eb860f6ed4387b18fa887a225c73a67da4f Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Tue Sep 6 11:41:33 2016 +0200 x86/levelling: Pass a vcpu rather than a domain to ctxt_switch_levelling() A subsequent change needs to special-case OSXSAVE handling, which is per-vcpu rather than per-domain. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> master commit: 33b23e5ab319a6bf9bfd38c4d9268fa6d9d072c6 master date: 2016-09-01 11:41:05 +0100 commit fb87d0266629e9b8a56f968bc014365d0b220b84 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Tue Sep 6 11:41:05 2016 +0200 x86/levelling: Restrict non-architectural OSXSAVE handling to emulated CPUID There is no need to extend the workaround to the faulted CPUID view, as Linux's dependence on the workaround is stricly via the emulated view. This causes a guest kernel faulted CPUID to observe architectural behaviour with respect to its CR4.OSXSAVE setting. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> master commit: 3b7cac5232012e167b284aba738fef1eceda33f8 master date: 2016-09-01 11:41:03 +0100 commit ed48c80f9fef4a14fba7c52ea780374dcb1e3212 Author: Feng Wu <feng.wu@xxxxxxxxx> Date: Tue Sep 6 11:40:36 2016 +0200 passthrough: fix a BUG_ON issue The 'idx' can equal to the max number of vCPUs, fix it. Signed-off-by: Feng Wu <feng.wu@xxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> master commit: f164d498810560322c9f3a3f801eace6ebc6c9e1 master date: 2016-08-31 18:13:47 +0200 commit dbaf2c89d4083c26387ae34cde9c61464321cb30 Author: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx> Date: Tue Sep 6 11:39:35 2016 +0200 x86/HVM: add guarding logic for VMX specific code The struct hvm_domain.vmx is defined in a union along with the svm. This can causes issue for SVM since this code is used in the common scheduling code for x86. The logic must check for cpu_has_vmx before accessing the hvm_domain.vmx sturcture. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> master commit: 81caac0cd0f56b0052a7884e6bd99e3a652ddd59 master date: 2016-08-29 16:05:31 +0200 (qemu changes not included) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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