Re: [Xen-devel] [PATCH] arm64:renesas: Introduce early console for Salvator-X board

[Iurii Mykhalskyi <iurii.mykhalskyi@xxxxxxxxxxxxxxx>]

Hello Dirk,

I have made only single change - I recompile ATF to leave CPU in EL2 mode and reflash it.

Looks like this way are the mostly "correct" approach for this board.

All changes are made in publicly available sources, based on official Renesas H3 yocto layer - https://github.com/renesas-rcar/meta-renesas

If you don't mind - I can create & handle documentation page about board setup and take ownership about further board support.

With the best regards,

Iurii Mykhalskyi

On Tue, Nov 8, 2016 at 5:22 PM, Dirk Behme <dirk.behme@xxxxxxxxx> wrote:

On 08.11.2016 15:30, Julien Grall wrote:

Hello Iurii,

Dirk (in CC) sent a similar patch few months ago to add support for
this board (see [1]).

I didn't ack the patch back then because I wanted to see documentation
on the wiki to bring up Xen on this board (see [2] for the
requirements). I didn't see any follow-up since then for this board.

Can one of you write a documentation for this board

Yes, that would be nice.

As mentioned, I couldn't find an 'easy' way to load Xen without modifying the firmware (U-Boot or ATF) or using a JTAG debugger. Therefore I hesitated to write that documentation.

Maybe Iurii found an easier, more user compatible way?

Best regards

Dirk

and take

"ownership" on this board?

Regards,

[1]
https://lists.xenproject.org/archives/html/xen-devel/2016-07/msg00315.html

[2]
https://lists.xenproject.org/archives/html/xen-devel/2016-07/msg00130.html


On 08/11/2016 14:20, Iurii Mykhalskyi wrote:

From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>

Add support for the "Salvator-X" development board based on R-Car H3
SoC
which has SCIF compatible UART.

Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
Signed-off-by: Iurii Mykhalskyi <iurii.mykhalskyi@globallogic.com>
---
 xen/arch/arm/Rules.mk             |  1 +
 xen/arch/arm/arm64/debug-scif.inc | 51
+++++++++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+)
 create mode 100644 xen/arch/arm/arm64/debug-scif.inc

diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk
index 569a0ba..7989634 100644
--- a/xen/arch/arm/Rules.mk
+++ b/xen/arch/arm/Rules.mk
@@ -34,6 +34,7 @@ EARLY_PRINTK_fastmodel      :=
pl011,0x1c090000,115200
 EARLY_PRINTK_exynos5250     := exynos4210,0x12c20000
 EARLY_PRINTK_juno           := pl011,0x7ff80000
 EARLY_PRINTK_lager          := scif,0xe6e60000
+EARLY_PRINTK_salvator       := scif,0xe6e88000
 EARLY_PRINTK_midway         := pl011,0xfff36000
 EARLY_PRINTK_omap5432       := 8250,0x48020000,2
 EARLY_PRINTK_seattle        := pl011,0xe1010000
diff --git a/xen/arch/arm/arm64/debug-scif.inc
b/xen/arch/arm/arm64/debug-scif.inc
new file mode 100644
index 0000000..1f4d657
--- /dev/null
+++ b/xen/arch/arm/arm64/debug-scif.inc
@@ -0,0 +1,51 @@
+/*
+ * xen/arch/arm/arm64/debug-scif.inc
+ *
+ * SCIF specific debug code
+ *
+ * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
+ * Iurii Konovalenko <iurii.konovalenko@globallogic.com>
+ * Iurii Mykhalskyi <iurii.mykhalskyi@globallogic.com>
+ * Copyright (C) 2014-2016, Globallogic.
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License as
published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/scif-uart.h>
+
+/* SCIF UART wait UART to be ready to transmit
+ * rb: register which contains the UART base address
+ * rc: scratch register
+ */
+.macro early_uart_ready xb c
+1:
+        ldrh   w\c, [\xb, #SCIF_SCFSR]   /* <- SCFSR (status
register) */
+        tst    w\c, #SCFSR_TDFE          /* Check TDFE bit */
+        beq    1b                        /* Wait for the UART to be
ready */
+.endm
+
+/* SCIF UART transmit character
+ * rb: register which contains the UART base address
+ * rt: register which contains the character to transmit
+ */
+.macro early_uart_transmit xb wt
+        strb   \wt, [\xb, #SCIF_SCFTDR]                  /* ->
SCFTDR (data register) */
+        ldrh   \wt, [\xb, #SCIF_SCFSR]                   /* <-
SCFSR (status register) */
+        and    \wt, \wt, #(~(SCFSR_TEND | SCFSR_TDFE))   /* Clear
TEND and TDFE bits */
+        strh   \wt, [\xb, #SCIF_SCFSR]                   /* ->
SCFSR (status register) */
+.endm
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */

--

Iurii Mykhalskyi | Senior Software Engineer
GlobalLogic
P +38.044.492.9695x3664  M +38.096.311.5467  S mad-nemoi
www.globallogic.com

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