[Xen-devel] Future support of 5-level paging in Xen

[Juergen Gross <jgross@xxxxxxxx>]

The first round of (very preliminary) patches for supporting the new
5-level paging of future Intel x86 processors [1] has been posted to
lkml:

https://lkml.org/lkml/2016/12/8/378

An explicit note has been added: "CONFIG_XEN is broken." and
"I would appreciate help with the code."

I think we should start a discussion what we want to do in future:

- are we going to support 5-level paging for PV guests?
- do we limit 5-level paging to PVH and HVM?


Juergen

[1]
https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf

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