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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [qemu-mainline test] 106635: regressions - FAIL
flight 106635 qemu-mainline real [real] http://logs.test-lab.xenproject.org/osstest/logs/106635/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-armhf-armhf-xl-vhd 14 guest-start/debian.repeat fail REGR. vs. 106574 Regressions which are regarded as allowable (not blocking): test-armhf-armhf-libvirt 13 saverestore-support-check fail like 106574 test-amd64-amd64-xl-qemuu-win7-amd64 16 guest-stop fail like 106574 test-amd64-i386-xl-qemuu-win7-amd64 16 guest-stop fail like 106574 test-armhf-armhf-libvirt-xsm 13 saverestore-support-check fail like 106574 test-amd64-amd64-xl-rtds 9 debian-install fail like 106574 test-armhf-armhf-libvirt-raw 12 saverestore-support-check fail like 106574 Tests which did not succeed, but are not blocking: test-arm64-arm64-libvirt-xsm 1 build-check(1) blocked n/a test-arm64-arm64-xl 1 build-check(1) blocked n/a build-arm64-libvirt 1 build-check(1) blocked n/a test-arm64-arm64-libvirt-qcow2 1 build-check(1) blocked n/a test-arm64-arm64-libvirt 1 build-check(1) blocked n/a test-arm64-arm64-xl-credit2 1 build-check(1) blocked n/a test-arm64-arm64-xl-rtds 1 build-check(1) blocked n/a test-arm64-arm64-xl-multivcpu 1 build-check(1) blocked n/a test-arm64-arm64-xl-xsm 1 build-check(1) blocked n/a test-amd64-amd64-xl-pvh-amd 11 guest-start fail never pass test-amd64-amd64-xl-pvh-intel 11 guest-start fail never pass test-amd64-i386-libvirt 12 migrate-support-check fail never pass test-amd64-amd64-libvirt-xsm 12 migrate-support-check fail never pass test-amd64-amd64-libvirt 12 migrate-support-check fail never pass build-arm64 5 xen-build fail never pass build-arm64-xsm 5 xen-build fail never pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass build-arm64-pvops 5 kernel-build fail never pass test-armhf-armhf-xl-arndale 12 migrate-support-check fail never pass test-armhf-armhf-xl-arndale 13 saverestore-support-check fail never pass test-amd64-amd64-libvirt-vhd 11 migrate-support-check fail never pass test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2 fail never pass test-armhf-armhf-xl-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-xsm 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-xl-cubietruck 12 migrate-support-check fail never pass test-armhf-armhf-xl-cubietruck 13 saverestore-support-check fail never pass test-amd64-i386-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl 12 migrate-support-check fail never pass test-armhf-armhf-xl 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 13 saverestore-support-check fail never pass test-armhf-armhf-xl-multivcpu 12 migrate-support-check fail never pass test-armhf-armhf-xl-multivcpu 13 saverestore-support-check fail never pass test-armhf-armhf-xl-rtds 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 13 saverestore-support-check fail never pass test-armhf-armhf-xl-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 12 saverestore-support-check fail never pass test-armhf-armhf-libvirt-raw 11 migrate-support-check fail never pass version targeted for testing: qemuu 95b0eca46e03ffa0b20d29d1b3127c291accea39 baseline version: qemuu dd4d2578215cd380f40a38028a9904e15b135ef3 Last test of basis 106574 2017-03-09 19:12:40 Z 4 days Testing same since 106635 2017-03-13 11:48:20 Z 0 days 1 attempts ------------------------------------------------------------ People who touched revisions under test: Alex Bennée <alex.bennee@xxxxxxxxxx> Alexander Boettcher <alexander.boettcher@xxxxxxxxxxxxxxx> Eduardo Habkost <ehabkost@xxxxxxxxxx> Max Filippov <jcmvbkbc@xxxxxxxxx> Paolo Bonzini <pbonzini@xxxxxxxxxx> Peter Maydell <peter.maydell@xxxxxxxxxx> Yongbok Kim <yongbok.kim@xxxxxxxxxx> jobs: build-amd64-xsm pass build-arm64-xsm fail build-armhf-xsm pass build-i386-xsm pass build-amd64 pass build-arm64 fail build-armhf pass build-i386 pass build-amd64-libvirt pass build-arm64-libvirt blocked build-armhf-libvirt pass build-i386-libvirt pass build-amd64-pvops pass build-arm64-pvops fail build-armhf-pvops pass build-i386-pvops pass test-amd64-amd64-xl pass test-arm64-arm64-xl blocked test-armhf-armhf-xl pass test-amd64-i386-xl pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-xsm pass test-arm64-arm64-libvirt-xsm blocked test-armhf-armhf-libvirt-xsm pass test-amd64-i386-libvirt-xsm pass test-amd64-amd64-xl-xsm pass test-arm64-arm64-xl-xsm blocked test-armhf-armhf-xl-xsm pass test-amd64-i386-xl-xsm pass test-amd64-amd64-qemuu-nested-amd fail test-amd64-amd64-xl-pvh-amd fail test-amd64-i386-qemuu-rhel6hvm-amd pass test-amd64-amd64-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-freebsd10-amd64 pass test-amd64-amd64-xl-qemuu-ovmf-amd64 pass test-amd64-i386-xl-qemuu-ovmf-amd64 pass test-amd64-amd64-xl-qemuu-win7-amd64 fail test-amd64-i386-xl-qemuu-win7-amd64 fail test-armhf-armhf-xl-arndale pass test-amd64-amd64-xl-credit2 pass test-arm64-arm64-xl-credit2 blocked test-armhf-armhf-xl-credit2 pass test-armhf-armhf-xl-cubietruck pass test-amd64-i386-freebsd10-i386 pass test-amd64-amd64-qemuu-nested-intel pass test-amd64-amd64-xl-pvh-intel fail test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-amd64-libvirt pass test-arm64-arm64-libvirt blocked test-armhf-armhf-libvirt pass test-amd64-i386-libvirt pass test-amd64-amd64-xl-multivcpu pass test-arm64-arm64-xl-multivcpu blocked test-armhf-armhf-xl-multivcpu pass test-amd64-amd64-pair pass test-amd64-i386-pair pass test-amd64-amd64-libvirt-pair pass test-amd64-i386-libvirt-pair pass test-amd64-amd64-amd64-pvgrub pass test-amd64-amd64-i386-pvgrub pass test-amd64-amd64-pygrub pass test-arm64-arm64-libvirt-qcow2 blocked test-amd64-amd64-xl-qcow2 pass test-armhf-armhf-libvirt-raw pass test-amd64-i386-xl-raw pass test-amd64-amd64-xl-rtds fail test-arm64-arm64-xl-rtds blocked test-armhf-armhf-xl-rtds pass test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 pass test-amd64-amd64-libvirt-vhd pass test-armhf-armhf-xl-vhd fail test-amd64-amd64-xl-qemuu-winxpsp3 pass test-amd64-i386-xl-qemuu-winxpsp3 pass ------------------------------------------------------------ sg-report-flight on osstest.test-lab.xenproject.org logs: /home/logs/logs images: /home/logs/images Logs, config files, etc. are available at http://logs.test-lab.xenproject.org/osstest/logs Explanation of these reports, and of osstest in general, is at http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master Test harness code can be found at http://xenbits.xen.org/gitweb?p=osstest.git;a=summary Not pushing. ------------------------------------------------------------ commit 95b0eca46e03ffa0b20d29d1b3127c291accea39 Merge: dd4d257 68bf93c Author: Peter Maydell <peter.maydell@xxxxxxxxxx> Date: Thu Mar 9 18:53:55 2017 +0000 Merge remote-tracking branch 'remotes/stsquad/tags/pull-mttcg-fixups-090317-1' into staging Fix-ups for MTTCG regressions for 2.9 This is the same as v3 posted a few days ago except with a few extra Reviewed-by tags added. # gpg: Signature made Thu 09 Mar 2017 10:45:18 GMT # gpg: using RSA key 0xFBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@xxxxxxxxxx>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-mttcg-fixups-090317-1: hw/intc/arm_gic: modernise the DPRINTF target/arm/helper: make it clear the EC field is also in hex target-i386: defer VMEXIT to do_interrupt target/mips: hold BQL for timer interrupts translate-all: exit cpu_restore_state early if translating target/xtensa: hold BQL for interrupt processing s390x/misc_helper.c: wrap IO instructions in BQL sparc/sparc64: grab BQL before calling cpu_check_irqs cpus.c: add additional error_report when !TARGET_SUPPORT_MTTCG target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO vl/cpus: be smarter with icount and MTTCG Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx> commit 68bf93ce9dc5c84c45a827ce2bd6eab768524e79 Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Thu Mar 2 19:08:52 2017 +0000 hw/intc/arm_gic: modernise the DPRINTF While I was debugging the icount issues I realised a bunch of the messages look quite similar. I've fixed this by including __func__ in the debug print. At the same time I move the a modern if (GATE) style printf which ensures the compiler can check for format string errors even if the code gets optimised away in the non-DEBUG_GIC case. Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Peter Maydell <peter.maydell@xxxxxxxxxx> Reviewed-by: Philippe Mathieu-Daudé <f4bug@xxxxxxxxx> commit 6568da459b611845ef55526cd23afc9fa9f4647f Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Thu Mar 2 14:07:16 2017 +0000 target/arm/helper: make it clear the EC field is also in hex ..just like the rest of the displayed ESR register. Otherwise people might scratch their heads if a not obviously hex number is displayed for the EC field. Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Peter Maydell <peter.maydell@xxxxxxxxxx> Reviewed-by: KONRAD Frederic <fred.konrad@xxxxxxxxxxxxx> Reviewed-by: Philippe Mathieu-Daudé <f4bug@xxxxxxxxx> commit 10cde894b63146139f981857e4eedf756fa53dcb Author: Paolo Bonzini <pbonzini@xxxxxxxxxx> Date: Tue Mar 7 12:37:36 2017 +0100 target-i386: defer VMEXIT to do_interrupt Paths through the softmmu code during code generation now need to be audited to check for double locking of tb_lock. In particular, VMEXIT can take tb_lock through cpu_vmexit -> cpu_x86_update_cr4 -> tlb_flush. To avoid this, split VMEXIT delivery in two parts, similar to what is done with exceptions. cpu_vmexit only records the VMEXIT exit code and information, and cc->do_interrupt can then deliver it when it is safe to take the lock. Reported-by: Alexander Boettcher <alexander.boettcher@xxxxxxxxxxxxxxx> Suggested-by: Richard Henderson <rth@xxxxxxxxxxx> Tested-by: Alexander Boettcher <alexander.boettcher@xxxxxxxxxxxxxxx> Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx> Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx> commit d394698d73836d1c50545bdb32dc58d09708fcfb Author: Yongbok Kim <yongbok.kim@xxxxxxxxxx> Date: Fri Mar 3 11:20:21 2017 +0000 target/mips: hold BQL for timer interrupts Hold BQL when accessing timer which can cause interrupts Signed-off-by: Yongbok Kim <yongbok.kim@xxxxxxxxxx> Reviewed-by: Philippe Mathieu-Daudé <f4bug@xxxxxxxxx> Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> commit d8b2239bcd8872a5c5f7534d1658fc2365caab2d Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Thu Mar 2 10:31:32 2017 +0000 translate-all: exit cpu_restore_state early if translating The translation code uses cpu_ld*_code which can trigger a tlb_fill which if it fails will erroneously attempts a fault resolution. This never works during translation as the TB being generated hasn't been added yet. The target should have checked retaddr before calling cpu_restore_state but for those that have yet to be fixed we do it here to avoid a recursive tb_lock() under MTTCG's new locking regime. Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx> commit 47e20887970c3f267a4be9afacb72dbd51e6655f Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Wed Mar 1 20:29:10 2017 +0000 target/xtensa: hold BQL for interrupt processing Make sure we have the BQL held when processing interrupts. Reported-by: Thomas Huth <thuth@xxxxxxxxxx> Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Acked-by: Max Filippov <jcmvbkbc@xxxxxxxxx> commit 278f5e98c647f74e93636e8b6f9ba20a71765a44 Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Wed Mar 1 16:22:40 2017 +0000 s390x/misc_helper.c: wrap IO instructions in BQL Helpers that can trigger IO events (including interrupts) need to be protected by the BQL. I've updated all the helpers that call into an ioinst_handle_* functions. Reported-by: Thomas Huth <thuth@xxxxxxxxxx> Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Philippe Mathieu-Daudé <f4bug@xxxxxxxxx> commit 5ee5993001cf32addb86a92e2ae8cb090fbc1462 Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Wed Mar 1 13:20:02 2017 +0000 sparc/sparc64: grab BQL before calling cpu_check_irqs IRQ modification is part of device emulation and should be done while the BQL is held to prevent races when MTTCG is enabled. This adds assertions in the hw emulation layer and wraps the calls from helpers in the BQL. Reported-by: Mark Cave-Ayland <mark.cave-ayland@xxxxxxxxxxxx> Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> commit c34c762015fec023c3ea5cf3629cbac462a80973 Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Tue Feb 28 14:40:17 2017 +0000 cpus.c: add additional error_report when !TARGET_SUPPORT_MTTCG While we may fail the memory ordering check later that can be confusing. So in cases where TARGET_SUPPORT_MTTCG has yet to be defined we should say so specifically. Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx> Reviewed-by: Philippe Mathieu-Daudé <f4bug@xxxxxxxxx> commit 72c1701f62e8d44eb24a0583a958edc280105455 Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Tue Feb 28 14:35:14 2017 +0000 target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO This suppresses the incorrect warning when forcing MTTCG for x86 guests on x86 hosts. A future patch will still warn when TARGET_SUPPORT_MTTCG hasn't been defined for the guest (which is still pending for x86). Reported-by: Paolo Bonzini <pbonzini@xxxxxxxxxx> Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx> Reviewed-by: Eduardo Habkost <ehabkost@xxxxxxxxxx> Acked-by: Eduardo Habkost <ehabkost@xxxxxxxxxx> commit 83fd9629a39ee8a58f1f772a2ca3a7745a4c5743 Author: Alex Bennée <alex.bennee@xxxxxxxxxx> Date: Mon Feb 27 17:09:01 2017 +0000 vl/cpus: be smarter with icount and MTTCG The sense of the test was inverted. Make it simple, if icount is enabled then we disabled MTTCG by default. If the user tries to force MTTCG upon us then we tell them "no". Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx> _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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