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[Xen-devel] [PATCH v3 2/4] x86emul: Support vpclmulqdq



The previous vpclmulqdq only support AVX128.
Icelake added AVX256 support.

Signed-off-by: Yang Zhong <yang.zhong@xxxxxxxxx>
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 8 +++++++-
 xen/include/asm-x86/cpufeature.h       | 1 +
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c 
b/xen/arch/x86/x86_emulate/x86_emulate.c
index c207f61..559b387 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1626,6 +1626,7 @@ static bool vcpu_has(
 #define vcpu_has_clwb()        vcpu_has(         7, EBX, 24, ctxt, ops)
 #define vcpu_has_sha()         vcpu_has(         7, EBX, 29, ctxt, ops)
 #define vcpu_has_gfni()        vcpu_has(         7, ECX,  8, ctxt, ops)
+#define vcpu_has_vpclmulqdq()  vcpu_has(         7, ECX, 10, ctxt, ops)
 #define vcpu_has_rdpid()       vcpu_has(         7, ECX, 22, ctxt, ops)
 #define vcpu_has_clzero()      vcpu_has(0x80000008, EBX,  0, ctxt, ops)
 
@@ -7672,7 +7673,12 @@ x86_emulate(
         host_and_vcpu_must_have(pclmulqdq);
         if ( vex.opcx == vex_none )
             goto simd_0f3a_common;
-        generate_exception_if(vex.l, EXC_UD);
+        if ( !vex.l )
+        {
+            generate_exception_if(vex.l, EXC_UD);
+            goto simd_0f_imm8_avx;
+        }
+        host_and_vcpu_must_have(vpclmulqdq);
         goto simd_0f_imm8_avx;
 
     case X86EMUL_OPC_VEX_66(0x0f3a, 0x4a): /* vblendvps 
{x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */
diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h
index 9c43cd8..3f24f06 100644
--- a/xen/include/asm-x86/cpufeature.h
+++ b/xen/include/asm-x86/cpufeature.h
@@ -99,6 +99,7 @@
 
 /* CPUID level 0x00000007:0.ecx */
 #define cpu_has_gfni            boot_cpu_has(X86_FEATURE_GFNI)
+#define cpu_has_vpclmulqdq      boot_cpu_has(X86_FEATURE_VPCLMULQDQ)
 
 /* CPUID level 0x80000007.edx */
 #define cpu_has_itsc            boot_cpu_has(X86_FEATURE_ITSC)
-- 
1.9.1


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