Re: [Xen-devel] [PATCH v2 26/45] ARM: new VGIC: Add PENDING registers handlers

[Julien Grall <julien.grall@xxxxxxx>]

Hi Andre,

On 03/15/2018 08:30 PM, Andre Przywara wrote:
> The pending register handlers are shared between the v2 and v3
> emulation, so their implementation goes into vgic-mmio.c, to be easily
> referenced from the v3 emulation as well later.
> For level triggered interrupts the real line level is unaffected by
> this write, so we keep this state separate and combine it with the
> device's level to get the actual pending state.
> Hardware mapped IRQs need some special handling, as their hardware state
> has to be coordinated with the virtual pending bit to avoid hanging
> or masked interrupts.
>
> This is based on Linux commit 96b298000db4, written by Andre Przywara.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxxxxx>
Reviewed-by: Julien Grall <julien.grall@xxxxxxx>

Cheers,

--
Julien Grall

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