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Re: [Xen-devel] [PATCH v2 01/17] arm: Placeholder for handling Group0/1 traps





On 03/27/2018 03:31 PM, Marc Zyngier wrote:
On 27/03/18 10:07, Manish Jaggi wrote:
The errata will require to emulate the GIC virtual CPU interface in Xen.
Because the hypervisor will update its internal state of the vGIC, we want
to avoid messing up with it. So the errata is handled separately from the
rest of the hypervisor.

New file vgic-v3-sr.c is added which will hold trap and emulate code
for group0 / group1 registers. Workaround for cavium Errata 30115
needs this emulation code.

vgic_v3_handle_cpuif_access would be called from do_trap_guest_sync
in subsequent patches based on errata macros.

Signed-off-by: Manish Jaggi <manish.jaggi@xxxxxxxxxx>
---
  xen/arch/arm/arm64/vgic-v3-sr.c   | 60 +++++++++++++++++++++++++++++++++++++++
  xen/include/asm-arm/arm64/traps.h |  2 ++
  2 files changed, 62 insertions(+)
  create mode 100644 xen/arch/arm/arm64/vgic-v3-sr.c

diff --git a/xen/arch/arm/arm64/vgic-v3-sr.c b/xen/arch/arm/arm64/vgic-v3-sr.c
new file mode 100644
index 0000000000..39ab1ed6ca
--- /dev/null
+++ b/xen/arch/arm/arm64/vgic-v3-sr.c
@@ -0,0 +1,60 @@
+/*
+ * xen/arch/arm/arm64/vgic-v3-sr.c
+ *
+ * Code to emulate group0/group1 traps for handling
+ * cavium erratum 30115
+ *
+ * Manish Jaggi <manish.jaggi@xxxxxxxxxx>
+ * Copyright (c) 2018 Cavium.
IANAL, but I don't think this copyright notice is correct.

I wrote about 90% of this series, and the copyright for that code is
owned by ARM, and licensed under the GPLv2. You have the right to
duplicate that code and do almost whatever you want with (within the
limits of the GPLv2), but you still don't own the copyright.

I suggest you get in touch with your legal department for clarification
on the matter.
I will remove the copyright line, and add this
Original Author: Marc Zyngier <>
Ported to Xen by: Manish Jaggi <>

Hope that is fine.
I can resend this single patch
Thanks,

        M.


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