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Re: [Xen-devel] [PATCH v2 09/17] arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler





On 03/27/2018 04:26 PM, Marc Zyngier wrote:
On 27/03/18 10:07, Manish Jaggi wrote:
This patch is ported from linux to xen
commit: 2724c11a1df4b22ee966c04809ea0e808f66b04e
(KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler)

Add a handler for reading the guest's view of the ICV_HPPIR1_EL1
register. This is a simple parsing of the available LRs, extracting the
highest available interrupt.

Signed-off-by: Manish Jaggi <manish.jaggi@xxxxxxxxxx>
---
  xen/arch/arm/arm64/vgic-v3-sr.c     | 31 +++++++++++++++++++++++++++++++
  xen/include/asm-arm/arm64/sysregs.h |  1 +
  2 files changed, 32 insertions(+)

diff --git a/xen/arch/arm/arm64/vgic-v3-sr.c b/xen/arch/arm/arm64/vgic-v3-sr.c
index c67e7c6ada..f11c7646da 100644
--- a/xen/arch/arm/arm64/vgic-v3-sr.c
+++ b/xen/arch/arm/arm64/vgic-v3-sr.c
@@ -674,6 +674,33 @@ static void vreg_emulate_apxr3(struct cpu_user_regs *regs,
          vgic_v3_write_apxrn(regs, hsr, 3);
  }
+static void vgic_v3_read_hppir1(struct cpu_user_regs *regs,
+                                const union hsr hsr)
+{
+    uint64_t lr_val;
+    int lr, lr_grp, grp;
+    uint32_t vmcr = READ_SYSREG32(ICH_VMCR_EL2);
+
+    grp = vgic_v3_get_group(hsr);
+    lr = vgic_v3_highest_priority_lr(regs, vmcr, &lr_val);
+
+    if ( lr == -1 )
+        goto spurious;
+
+    lr_grp = !!(lr_val & ICH_LR_GROUP);
+    if ( lr_grp != grp )
+        lr_val = ICC_IAR1_EL1_SPURIOUS;
+
+spurious:
+    set_user_reg(regs, hsr.sysreg.reg, lr_val & ICH_LR_VIRTUAL_ID_MASK);
+}
+
+static void vreg_emulate_hppir1(struct cpu_user_regs *regs,
+                                const union hsr hsr)
+{
+    vgic_v3_read_hppir1(regs, hsr);
+}
See why I said that this "emulate" function idea didn't hold much water?
I wanted to put a check for read call, but I was just trying to match the patch, So that a later patch would inject an undef exception to guest if a write is issue by guest on hppir1

        M.


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