Re: [Xen-devel] [PATCH v3] x86/cpu: Add supports for zhaoxin x86 platform

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 03.05.18 at 06:43, <Davidwang@xxxxxxxxxxx> wrote:
> From: DavidWang <davidwang@xxxxxxxxxxx>
> 
> Zhaoxin is a x86 IC designer. Its SOC products support both CPU
> virtualization and I/O virtualization, which are compatible with Intel
> VMX and VT-d respectively. Zhaoxin has 'Shanghai' CPU vendor ID.
> 
> Signed-off-by: DavidWang <davidwang@xxxxxxxxxxx>
> ---

Please have a brief list of changes from the previous version here.

> --- a/xen/arch/x86/cpu/intel_cacheinfo.c
> +++ b/xen/arch/x86/cpu/intel_cacheinfo.c
> @@ -176,7 +176,9 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
>        * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for
>        * trace cache
>        */
> -     if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) {
> +     if ( (num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1 &&
> +         c->x86_vendor != X86_VENDOR_SHANGHAI )
> +     {

There's again a mixup of indentation styles here.

> --- /dev/null
> +++ b/xen/arch/x86/cpu/shanghai.c
> @@ -0,0 +1,30 @@
> +#include <xen/bitops.h>
> +#include <xen/init.h>
> +#include <asm/processor.h>
> +#include "cpu.h"
> +
> +static void init_shanghai(struct cpuinfo_x86 *c)
> +{
> +    unsigned int l2 = 0;

What use is this local variable, considering ...

> +    if ( cpu_has(c, X86_FEATURE_ITSC) )
> +    {
> +        __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> +        __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
> +        __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
> +    }
> +
> +    l2 = init_intel_cacheinfo(c);
> +}

... this is its only use?

Jan



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