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[Xen-devel] [PATCH v3] x86/cpu: Add supports for zhaoxin x86 platform



From: DavidWang <davidwang@xxxxxxxxxxx>

Zhaoxin is a x86 IC designer. Its SOC products support both CPU
virtualization and I/O virtualization, which are compatible with Intel
VMX and VT-d respectively. Zhaoxin has 'Shanghai' CPU vendor ID.

Signed-off-by: DavidWang <davidwang@xxxxxxxxxxx>
---
 xen/arch/x86/cpu/Makefile          |  1 +
 xen/arch/x86/cpu/common.c          |  1 +
 xen/arch/x86/cpu/intel_cacheinfo.c |  4 +++-
 xen/arch/x86/cpu/shanghai.c        | 30 ++++++++++++++++++++++++++++++
 xen/include/asm-x86/setup.h        |  1 +
 xen/include/asm-x86/x86-vendors.h  |  3 ++-
 6 files changed, 38 insertions(+), 2 deletions(-)
 create mode 100644 xen/arch/x86/cpu/shanghai.c

diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile
index 74f23ae..34a01ca 100644
--- a/xen/arch/x86/cpu/Makefile
+++ b/xen/arch/x86/cpu/Makefile
@@ -7,4 +7,5 @@ obj-y += common.o
 obj-y += intel.o
 obj-y += intel_cacheinfo.o
 obj-y += mwait-idle.o
+obj-y += shanghai.o
 obj-y += vpmu.o vpmu_amd.o vpmu_intel.o
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 0a452ae..02863c9 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -709,6 +709,7 @@ void __init early_cpu_init(void)
        intel_cpu_init();
        amd_init_cpu();
        centaur_init_cpu();
+       shanghai_init_cpu();
        early_cpu_detect();
 }
 
diff --git a/xen/arch/x86/cpu/intel_cacheinfo.c 
b/xen/arch/x86/cpu/intel_cacheinfo.c
index 101e297..5f92254 100644
--- a/xen/arch/x86/cpu/intel_cacheinfo.c
+++ b/xen/arch/x86/cpu/intel_cacheinfo.c
@@ -176,7 +176,9 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
         * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for
         * trace cache
         */
-       if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) {
+       if ( (num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1 &&
+         c->x86_vendor != X86_VENDOR_SHANGHAI )
+       {
                /* supports eax=2  call */
                int i, j, n;
                int regs[4];
diff --git a/xen/arch/x86/cpu/shanghai.c b/xen/arch/x86/cpu/shanghai.c
new file mode 100644
index 0000000..4f424ed
--- /dev/null
+++ b/xen/arch/x86/cpu/shanghai.c
@@ -0,0 +1,30 @@
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <asm/processor.h>
+#include "cpu.h"
+
+static void init_shanghai(struct cpuinfo_x86 *c)
+{
+    unsigned int l2 = 0;
+
+    if ( cpu_has(c, X86_FEATURE_ITSC) )
+    {
+        __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+        __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
+        __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
+    }
+
+    l2 = init_intel_cacheinfo(c);
+}
+
+static const struct cpu_dev shanghai_cpu_dev = {
+    .c_vendor   = "  Shang",
+    .c_ident    = {"  Shanghai  "},
+    .c_init     = init_shanghai,
+};
+
+int __init shanghai_init_cpu(void)
+{
+    cpu_devs[X86_VENDOR_SHANGHAI] = &shanghai_cpu_dev;
+    return 0;
+}
diff --git a/xen/include/asm-x86/setup.h b/xen/include/asm-x86/setup.h
index 19232af..2c2d9fd 100644
--- a/xen/include/asm-x86/setup.h
+++ b/xen/include/asm-x86/setup.h
@@ -23,6 +23,7 @@ int cyrix_init_cpu(void);
 int nsc_init_cpu(void);
 int centaur_init_cpu(void);
 int transmeta_init_cpu(void);
+int shanghai_init_cpu(void);
 
 void set_nr_cpu_ids(unsigned int max_cpus);
 
diff --git a/xen/include/asm-x86/x86-vendors.h 
b/xen/include/asm-x86/x86-vendors.h
index cae5507..c53d0b9 100644
--- a/xen/include/asm-x86/x86-vendors.h
+++ b/xen/include/asm-x86/x86-vendors.h
@@ -7,7 +7,8 @@
 #define X86_VENDOR_INTEL 0
 #define X86_VENDOR_AMD 1
 #define X86_VENDOR_CENTAUR 2
-#define X86_VENDOR_NUM 3
+#define X86_VENDOR_SHANGHAI 3
+#define X86_VENDOR_NUM 4
 #define X86_VENDOR_UNKNOWN 0xff
 
 #endif /* __XEN_X86_VENDORS_H__ */
-- 
1.8.3.1


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