Re: [Xen-devel] [PATCH v1 1/2] x86/mm: Add mem access rights to NPT

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 30/05/18 12:29, Jan Beulich wrote:
>>>> On 30.05.18 at 13:20, <aisaila@xxxxxxxxxxxxxxx> wrote:
>> On Mi, 2018-05-30 at 03:52 -0600, Jan Beulich wrote:
>>>>>> On 30.05.18 at 11:04, <aisaila@xxxxxxxxxxxxxxx> wrote:
>>>> Sorry for the misunderstanding, I wanted to clarify if the 59:56
>>>> bits
>>>> are fully ok to be used or if not then where should I use 4 bits to
>>>> store the mem access info?
>>> I thought I had sufficiently explained this - you have two options:
>>> 1) Make sure (via some prereq patch(es)) bit 59 has no other use, and
>>>    then use 59:56.
>>> 2) Use another range that's provably having no other use, e.g.
>>>    58:55.
>> I've checked and bits 40:52 are defined in asm/page.h for page flags.
> 40:52? Hardly.
>
>> I've tried bits 53:56 and there where some problems with the guest not
>> starting or the image freezing,
> Well, you'll have to explain this (perhaps just to yourself).
>
>> bits 62 and 63 are not free so 59:56 is
>> the only space to be used for this purpose and is seems to function
>> correctly.
> Well - as said before, bit 59 is not available for use without some
> prereq work.

There are no software available bits in the top of an AMD IOMMU PTE. 
Bits 59:62 are defined, while bits 52:58 are strictly reserved and fault
if used.

I'm also not convinced of the safety of our current uses of bits 9:11
which are software available in the regular pagetables, but have
specific meaning in the IOMMU entries.

If the code IOMMU code disables page sharing, then lets go one small
step further and prohibit its use entirely.  There is no point trying to
maintain compatibility for an option which isn't used, especially if it
gets in the way of improvements like this in the SVM code.

~Andrew

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