[Xen-devel] [PATCH 11/15] x86/domctl: Add Hygon Dhyana support

[Pu Wen <puwen@xxxxxxxx>]

Add Hygon Dhyana support to update cpuid info for creating PV guest.

Signed-off-by: Pu Wen <puwen@xxxxxxxx>
---
 xen/arch/x86/domctl.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index aa8ad19..a64c724 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -175,6 +175,7 @@ static int update_domain_cpuid_info(struct domain *d,
                 mask |= ((uint64_t)edx << 32) | ecx;
                 break;
 
+            case X86_VENDOR_HYGON:
             case X86_VENDOR_AMD:
                 mask &= ((uint64_t)ecx << 32) | edx;
 
@@ -220,7 +221,8 @@ static int update_domain_cpuid_info(struct domain *d,
             uint32_t eax = ctl->eax;
             uint32_t ebx = p->feat._7b0;
 
-            if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+            if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+                 boot_cpu_data.x86_vendor == X86_VENDOR_HYGON )
                 mask &= ((uint64_t)eax << 32) | ebx;
 
             d->arch.pv.cpuidmasks->_7ab0 = mask;
@@ -281,8 +283,12 @@ static int update_domain_cpuid_info(struct domain *d,
             if ( cpu_has_cmp_legacy )
                 ecx |= cpufeat_mask(X86_FEATURE_CMP_LEGACY);
 
-            /* If not emulating AMD, clear the duplicated features in e1d. */
-            if ( p->x86_vendor != X86_VENDOR_AMD )
+            /*
+             * If not emulating AMD and Hygon, clear the duplicated features
+             * in e1d.
+             */
+            if ( p->x86_vendor != X86_VENDOR_AMD &&
+                 p->x86_vendor != X86_VENDOR_HYGON )
                 edx &= ~CPUID_COMMON_1D_FEATURES;
 
             switch ( boot_cpu_data.x86_vendor )
@@ -291,6 +297,7 @@ static int update_domain_cpuid_info(struct domain *d,
                 mask &= ((uint64_t)edx << 32) | ecx;
                 break;
 
+            case X86_VENDOR_HYGON:
             case X86_VENDOR_AMD:
                 mask &= ((uint64_t)ecx << 32) | edx;
 
-- 
2.7.4


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