[Xen-devel] [PATCH 13/15] x86/xstate: Add Hygon Dhyana support

[Pu Wen <puwen@xxxxxxxx>]

The Hygon Dhyana CPU don't save/restore FDP/FIP/FOP unless an exception
is pending. So add support for it in the function xrstor.

Signed-off-by: Pu Wen <puwen@xxxxxxxx>
---
 xen/arch/x86/xstate.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 15edd5d..962177f 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -369,7 +369,7 @@ void xrstor(struct vcpu *v, uint64_t mask)
     unsigned int faults, prev_faults;
 
     /*
-     * AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
+     * AMD or Hygon CPUs don't save/restore FDP/FIP/FOP unless an exception
      * is pending. Clear the x87 state here by setting it to fixed
      * values. The hypervisor data segment can be sometimes 0 and
      * sometimes new user value. Both should be ok. Use the FPU saved
@@ -377,7 +377,8 @@ void xrstor(struct vcpu *v, uint64_t mask)
      */
     if ( (mask & ptr->xsave_hdr.xstate_bv & X86_XCR0_FP) &&
          !(ptr->fpu_sse.fsw & ~ptr->fpu_sse.fcw & 0x003f) &&
-         boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+         (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+          boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) )
         asm volatile ( "fnclex\n\t"        /* clear exceptions */
                        "ffree %%st(7)\n\t" /* clear stack tag */
                        "fildl %0"          /* load to clear state */
-- 
2.7.4


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