[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2] x86emul: don't read mask register on AVX512F-incapable platforms
Nor when register state isn't sufficiently enabled. Reported-by: George Dunlap <george.dunlap@xxxxxxxxxx> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- This is surely a stable tree candidate, unless it could still make it into 4.12 before the release. --- v2: Add XCR0 check. --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -3511,7 +3511,8 @@ x86_emulate( } /* With a memory operand, fetch the mask register in use (if any). */ - if ( ea.type == OP_MEM && evex.opmsk ) + if ( ea.type == OP_MEM && cpu_has_avx512f && evex.opmsk && + _get_fpu(fpu_type = X86EMUL_FPU_opmask, ctxt, ops) == X86EMUL_OKAY ) { uint8_t *stb = get_stub(stub); @@ -3532,6 +3533,14 @@ x86_emulate( fault_suppression = true; } + if ( fpu_type == X86EMUL_FPU_opmask ) + { + /* Squash (side) effects of the _get_fpu() above. */ + x86_emul_reset_event(ctxt); + put_fpu(X86EMUL_FPU_opmask, false, state, ctxt, ops); + fpu_type = X86EMUL_FPU_none; + } + /* Decode (but don't fetch) the destination operand: register or memory. */ switch ( d & DstMask ) { _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |