Re: [Xen-devel] CPU frequency throttling based on the temperature

["Fredy P." <fredy.pulido@xxxxxxxxxxxxxxxxxxxx>]

On Wed, 2019-07-24 at 17:41 +0200, Roger Pau Monné wrote:

> > > What hardware interface does thermald (or the driver in Linux if
> > > there's one) use to get the temperature data?

In our initial POC using Xen 4.8.x we where using Linux coretemp driver
reading by example /class/sys/hwmon/hwmon0/temp3_input but it got
deprecated at commit 72e038450d3d5de1a39f0cfa2d2b0f9b3d43c6c6

Our ideal fix is to get back the /class/sys/hwmon/hwmon0 to feed
thermald in the same way we did in our POC. We understand that just
reverting that commit is not the right way, the question is what is the
right way?

> > > Is it exposed in a mmio region somewhere? Or maybe exposed as a
> > > pci
> > > device?
> 
> You haven't answered this, which I think it's quite relevant in order
> to know how to move forward. How is the temperature data exposed by
> the hardware will likely determine how to read it, and whether Xen or
> dom0 should access it.

I'm not sure if this is the right answer for that question but, we are
talking about the DTS (Digital Thermal Sensor) provided by the Intel
processor[1]

> If such data (or part of it) comes from ACPI dynamic tables then it
> must be dom0 the one that reads it, if it is otherwise exposed as a
> PCI device or maybe as a mmio region somewhere it could be Xen the
> one to read such information.

I'm not sure if I'll said something stupid but after to overview [1]
and commit 72e038450d3d5de1a39f0cfa2d2b0f9b3d43c6c6 my guess is we
retrieve DTS via Model Specific Register (MSR) and it is the x86/cpuid
leaf 0x6.

I think is a kind of gray zone because is the processor itself
(supposed to be handled by Xen) but is a kind of I/O (supposed to be
dom0)

> > > I think it depends on how this data is exposed by the hardware.
> > 
> > Is a Intel(R) Core(TM) i5-5350U CPU @ 1.80GHz processor, when you
> > say
> > the hardware is the board itself? or the processor?
> 
> The model itself is not that relevant, but rather how is the
> temperature exposed by the CPU, see my comment above.

I think could be because the DTS is inside the processor itself to be
honest I'm not a specialist in thermal systems for processors but it
looks Intel have good documents about the subject, by example [2]

> Thanks, Roger.

[1] Pag 68 
https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/5th-gen-core-family-datasheet-vol-1.pdf
[2] 
https://digitallibrary.intel.com/content/dam/ccl/public/cpu-monitoring-dts-peci-paper.pdf?token=eyJhbGciOiJIUzI1NiIsInR5cCI6IkpXVCJ9.eyJjb250ZW50SWQiOiI2MDA0MjAiLCJlbnRlcnByaXNlSWQiOiIyMDguODguMTEwLjQ2IiwiQUNDVF9OTSI6IiIsIkNOREFfTkJSIjoiIiwiaWF0IjoxNTY0MDU1NjkwfQ.TBPkSTO1CtkOZ1TqtbVe6IljK7hr6ius2iDDfj_SUEI


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