Re: [Xen-devel] [RFC 3/7] arm64:armds: ARM Compiler 6.6 does not accept `rx` registers naming for AArch64

[Stefano Stabellini <sstabellini@xxxxxxxxxx>]

On Wed, 6 Nov 2019, Jan Beulich wrote:
> On 06.11.2019 10:19, Andrii Anisov wrote:
> > --- a/xen/include/asm-arm/smccc.h
> > +++ b/xen/include/asm-arm/smccc.h
> > @@ -120,6 +120,8 @@ struct arm_smccc_res {
> >  #define __constraint_read_6 __constraint_read_5, "r" (r6)
> >  #define __constraint_read_7 __constraint_read_6, "r" (r7)
> >  
> > +#ifdef CONFIG_ARM_32
> > +
> >  #define __declare_arg_0(a0, res)                        \
> >      struct arm_smccc_res    *___res = res;              \
> >      register unsigned long  r0 asm("r0") = (uint32_t)a0;\
> > @@ -174,6 +176,64 @@ struct arm_smccc_res {
> >      __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res);           \
> >      register typeof(a7) r7 asm("r7") = __a7
> >  
> > +#else /* ARM_64 */
> > +
> > +#define __declare_arg_0(a0, res)                        \
> > +    struct arm_smccc_res    *___res = res;              \
> > +    register unsigned long  r0 asm("x0") = (uint32_t)a0;\
> > +    register unsigned long  r1 asm("x1");               \
> > +    register unsigned long  r2 asm("x2");               \
> > +    register unsigned long  r3 asm("x3")
> > +
> > +#define __declare_arg_1(a0, a1, res)                    \
> > +    typeof(a1) __a1 = a1;                               \
> > +    struct arm_smccc_res    *___res = res;              \
> > +    register unsigned long  r0 asm("x0") = (uint32_t)a0;\
> > +    register unsigned long  r1 asm("x1") = __a1;        \
> > +    register unsigned long  r2 asm("x2");               \
> > +    register unsigned long  r3 asm("x3")
> > +
> > +#define __declare_arg_2(a0, a1, a2, res)                \
> > +    typeof(a1) __a1 = a1;                               \
> > +    typeof(a2) __a2 = a2;                               \
> > +    struct arm_smccc_res    *___res = res;                              \
> > +    register unsigned long  r0 asm("x0") = (uint32_t)a0;\
> > +    register unsigned long  r1 asm("x1") = __a1;        \
> > +    register unsigned long  r2 asm("x2") = __a2;        \
> > +    register unsigned long  r3 asm("x3")
> > +
> > +#define __declare_arg_3(a0, a1, a2, a3, res)            \
> > +    typeof(a1) __a1 = a1;                               \
> > +    typeof(a2) __a2 = a2;                               \
> > +    typeof(a3) __a3 = a3;                               \
> > +    struct arm_smccc_res    *___res = res;              \
> > +    register unsigned long  r0 asm("x0") = (uint32_t)a0;\
> > +    register unsigned long  r1 asm("x1") = __a1;        \
> > +    register unsigned long  r2 asm("x2") = __a2;        \
> > +    register unsigned long  r3 asm("x3") = __a3
> > +
> > +#define __declare_arg_4(a0, a1, a2, a3, a4, res)        \
> > +    typeof(a4) __a4 = a4;                               \
> > +    __declare_arg_3(a0, a1, a2, a3, res);               \
> > +    register unsigned long r4 asm("x4") = __a4
> > +
> > +#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res)    \
> > +    typeof(a5) __a5 = a5;                               \
> > +    __declare_arg_4(a0, a1, a2, a3, a4, res);           \
> > +    register typeof(a5) r5 asm("x5") = __a5
> > +
> > +#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res)    \
> > +    typeof(a6) __a6 = a6;                                   \
> > +    __declare_arg_5(a0, a1, a2, a3, a4, a5, res);           \
> > +    register typeof(a6) r6 asm("x6") = __a6
> > +
> > +#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res)    \
> > +    typeof(a7) __a7 = a7;                                       \
> > +    __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res);           \
> > +    register typeof(a7) r7 asm("x7") = __a7
> > +
> > +#endif
> 
> I'm not an Arm maintainer, so my opinion may not mean much, but
> this is way too much code duplication for my taste. Isn't all you
> need an abstraction of the "r0" etc vs "x0" etc strings? Or even
> better, can't use to the "x0" etc form with the other compilers
> (seeing that these are their architectural names when taking the
> full with registers)?

Yes, please :-)

If there is no way to get the ARM C compiler to accept "r0" on aarch64
then a #define to abstract x0/r0 would be OK.

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