Re: [Xen-devel] [PATCH V2] arch: arm: vgic-v3: fix GICD_ISACTIVER range

[Stefano Stabellini <sstabellini@xxxxxxxxxx>]

On Fri, 22 Nov 2019, Peng Fan wrote:
> The end should be GICD_ISACTIVERN not GICD_ISACTIVER,
> and also print a warning for the unhandled read.
> 
> Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
> ---
> 
> V2:
>  Add a warning message
> 
>  xen/arch/arm/vgic-v3.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index 422b94f902..a15b9f6441 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -706,7 +706,10 @@ static int __vgic_v3_distr_common_mmio_read(const char 
> *name, struct vcpu *v,
>          goto read_as_zero;
>  
>      /* Read the active status of an IRQ via GICD/GICR is not supported */
> -    case VRANGE32(GICD_ISACTIVER, GICD_ISACTIVER):
> +    case VRANGE32(GICD_ISACTIVER, GICD_ISACTIVERN):
> +        printk(XENLOG_G_ERR "%pv: vGICD: unhandled read from ISACTIVER%d\n",
> +               v, (reg - GICD_ISACTIVER) / 4);

All the other similar printks that we have in vgic-v3.c don't have the
"/ 4", for instance:

    case VRANGE32(GICD_ISACTIVER, GICD_ISACTIVERN):
        if ( dabt.size != DABT_WORD ) goto bad_width;
        printk(XENLOG_G_ERR
               "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%d\n",
               v, name, r, reg - GICD_ISACTIVER);

However, reg reflects the address of the register, so actually, the
division by 4 looks correct if we want to get the index of the specific
register. Thanks for spotting this. We'll need to do a clean-up in the
file later.

Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>



> +        goto read_as_zero;
>      case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN):
>          goto read_as_zero;
>  
> -- 
> 2.16.4
> 

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