Re: [PATCH v4] x86/idle: prevent entering C6 with in service interrupts on Intel

[Jan Beulich <jbeulich@xxxxxxxx>]

On 22.05.2020 15:54, Roger Pau Monné wrote:
> On Fri, May 22, 2020 at 03:42:10PM +0200, Jan Beulich wrote:
>> On 21.05.2020 11:22, Roger Pau Monne wrote:
>>> Apply a workaround for Intel errata BDX99, CLX30, SKX100, CFW125,
>>> BDF104, BDH85, BDM135, KWB131: "A Pending Fixed Interrupt May Be
>>> Dispatched Before an Interrupt of The Same Priority Completes".
>>
>> While the change looks good to me as far as Broadwell goes, I
>> think it was before this posting that Andrew also pointed at
>> a specific Haswell erratum instance, still on the v3 thread.
>> Am I to imply a v5 will follow adding affected Haswell models
>> to the table?
> 
> Those refer to a different errata, see:
> 
> https://lore.kernel.org/xen-devel/84486d84-4452-af18-f7e7-753faf5a125d@xxxxxxxxxx/
> 
> So we believe this also affects Haswell, but the errata is not published
> for those CPUs (yet at least). If/when it's published I'm happy to add
> it, in the meantime I think we should go with what has been published
> by Intel.

Oh, sorry, yes - should have looked at the full thread again, not
just Andrew's initial response.

Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>

Jan