Re: [PATCH 1/2] x86/intel: insert Ice Lake X (server) model numbers

[Jan Beulich <jbeulich@xxxxxxxx>]

On 13.10.2020 05:02, Igor Druzhinin wrote:
> LBR, C-state MSRs and if_pschange_mc erratum applicability should correspond
> to Ice Lake desktop according to External Design Specification vol.2.

Could you tell me where this is publicly available? Even after spending
quite a bit of time on searching for it, I can't seem to be able to
find it. And the SDM doesn't have enough information (yet).

> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -183,6 +183,7 @@ static void do_get_hw_residencies(void *arg)
>      /* Ice Lake */
>      case 0x7D:
>      case 0x7E:
> +    case 0x6A:
>      /* Kaby Lake */
>      case 0x8E:
>      case 0x9E:

Here and below please honor the (partial) sorting that's in effect.

Jan