[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] x86/spec-ctrl: Skip RSB overwriting when safe to do so


  • To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Wed, 25 Aug 2021 16:36:17 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9TAIN4ceIngvBJyRdnHi95jZAfQsbtQLZl9d8QFurFM=; b=CmnCw2Gcov7Bd+0mg8KK67bJ8+C9OE+T13xegerRqIQyi7z+iR5iz8s7SekfHEkR1X0J7iBhxeBMMJ8n68vwyZI5YC8J0s0ypvudnkK1NzVP0OUADD0vijO3Va9Un8cI7JtGy4BljpHpIyADQXGLq2HOXB3nas//ItyyJh06AOIqEIcDGqeBElCP575hxjdDuYvpStjdXGfCqOujcM/ITJisbK2FDEOqL/yzx3QaQ1kA+qu2bSc4oPrT3fP17bIgkCAvYSA1QLzTeGLbrMLX66Z4GtY4QS2FX9fqQLHfKeULLxeX8vTqgP+SYcfMGBT2DVKj2OPBbs8FiS8tlbo5+w==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=DyKoNLqoX805SLjmoaXBzy7uKz4ofzXev1UQLECKCes/ZzNhISMx8xf6sEOm7yCvl5Y1uJLS9ZwWUuJSCVDkhEV+azZVoWRtsvMUrv9FvskV2cCtb85a8I1K9akchNpHLOiJQmrBUO/8xsj1CksGzwm02EQLznPU4biNeiIvrn6B1I5CjeFYoDEb81MpSgFnQnpmMkws90RolovohPyrPeYya6QhI8bgkRBb7QLBhXhySiEE82ASgmfIYRtaCVSC0K1EGFH3DP3hhFu18lkxC1Q9B+80qG324N6BxndtGnzBkaWj6kTqbsrYwRDi6VGvZEo14KA9UiOFw9oyRQVgvw==
  • Authentication-results: lists.xenproject.org; dkim=none (message not signed) header.d=none;lists.xenproject.org; dmarc=none action=none header.from=suse.com;
  • Cc: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Wed, 25 Aug 2021 14:36:33 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 25.08.2021 14:12, Andrew Cooper wrote:
> On 24/08/2021 14:04, Jan Beulich wrote:
>> On 19.08.2021 18:26, Andrew Cooper wrote:
>>> In some configurations, it is safe to not overwrite the RSB on entry to Xen.
>>> Both Intel and AMD have guidelines in this area, because of the performance
>>> difference it makes for native kernels.
>> I don't think I've come across AMD's guidelines - would you happen to
>> have a pointer?
> 
> APM Vol2 3.2.9 "Speculation Control MSRs"
> 
> The information about SMEP is in the final paragraph before describing
> MSR_SPEC_CTRL.STIBP.

Ah yes, thanks. Still need to get used to this now being in the PM rather
than in one or more separate docs. I now recall reading through this.

Jan




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.