[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v3 03/11] vpci/header: Move register assignments from init_bars
- To: Oleksandr Andrushchenko <Oleksandr_Andrushchenko@xxxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Wed, 27 Oct 2021 17:34:49 +0200
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=E7Fv1Im5mtr/Kbm5XYnuYLi1vcvEW6YgAsGomI1zCzs=; b=Rlh4JaMVAiXFT3w3DIZej3uprGNX/9mk2kbN+9ATk3isWgKUmzq0ZyCiCMLVltGxp5xeEfIzRteNT46X31+2NVWoc1yvg2xxGAiU5xuChmdXDWl7aXs4wufrvkqDtCblwj3i4jrlISxYzn8F0ELB5tdphiz5L07cz93uPZY9qAzknpihpRy29wc1038pSNyLTwASBRE3c+4wg6DErPTxCzcOCkGJPF7sIV7yI9wO4J1i8tq1u7UlMXIlZawewv4EyXUBnFiP20eI0Mp7fE6T4CjINoKXj6sGgd40T2PxvzGj3I1836RQ/9ehSmXgTYyRK3o6TkXDmUzXkRQzq7PA9g==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Zzof1VCqOUXSUPe8bqPiN/FXUHWHVVhyVu0BJOf6I8jGAGbbILqg19WIPBmVrY+rO21K0UpoLFi6qe4j569LJYx7NLW9xkxgjfMWAYTXIpOvXRXQHLs0+DLY8IvPpYWJYQVtvtKk93aJleu//w1qEE6AhsTOuiWZQm5c68icu9X5txa3ymXyoz5dQ5QWIliws2lrNZfkqhDu79XNtaCSInAvY3kW4qrWIOlCsocVcGvehcE+AALUAt7VvENl1KUsd/ThSFqOtyerd5nvg+yoHVN2IQlNk7r+IvOaMlgTU+5C5/6ftUXpUw55JCwJ+RLDNhWGpJjV9t3GJu1ls6tI8g==
- Authentication-results: esa2.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, "julien@xxxxxxx" <julien@xxxxxxx>, "sstabellini@xxxxxxxxxx" <sstabellini@xxxxxxxxxx>, Oleksandr Tyshchenko <Oleksandr_Tyshchenko@xxxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Artem Mygaiev <Artem_Mygaiev@xxxxxxxx>, "jbeulich@xxxxxxxx" <jbeulich@xxxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Rahul Singh <rahul.singh@xxxxxxx>
- Delivery-date: Wed, 27 Oct 2021 15:35:11 +0000
- Ironport-data: A9a23:j3ovtqpFYUx3T4IJyLbleJkDUzJeBmICYxIvgKrLsJaIsI4StFCzt garIBnSb/aCMDemf4h2aN+3o0MHu5PSx4VqTgM++CA8FCxA85uZCYyVIHmrMnLJJKUvbq7GA +byyDXkBJppJpMJjk71atANlZT4vE2xbuKU5NTsY0idfic5Dnd+4f5fs7Rh2Ncx2YLmW1nlV e7a+KUzBnf0g1aYDUpMg06zgEsHUCPa4W5wUvQWPJinjXeG/5UnJMt3yZKZdhMUdrJ8DO+iL 9sv+Znilo/vE7XBPfv++lrzWhVirrc/pmFigFIOM0SpqkAqSiDfTs/XnRfTAKtao2zhojx/9 DlCnZyyGSg0Prftov4UVAVYMiN/Eqd/0YaSdBBTseTLp6HHW37lwvEoB0AqJ4wIvO1wBAmi9 9RBdmpLNErawbvrnvTrEYGAhex6RCXvFJkYtXx6iynQEN4tQIzZQrWM7thdtNs1rp0QQa+CO ZtDAdZpRAXyZDgfGFEQNJg/gtyyq1z8fg1/gnvA8MLb5ECMlVcsgdABKuH9U8aWSMBiu1eXr 2PL4Uz0GhgfcteYzFKtzHWogePemDLhb6gbHra46/1CjUWawyoYDxh+fVmxrOS9i0W+c8lCM EFS8S0rxYAo/Uy2Sp/mXhu3oFaNpBtaUN1Ve8Uw5RuR0KPS70CcD3IdUz9aQNU8sYk9QjlC/ k+EmZblCCJitJWRSGmB7fGEoDWqIy8XIGQeIygeQmMtxN3uo5o6iB7Vef9lHLSold3+GTz2w DeioTA3gvMYistj/6em+VHKhRq8q56PSRQ6ji3wWm+m9Qp/aJSSW52z6VPb4PBDK66UVlCE+ nMDnqC29/sSBJuAkCiMRuQlH7yz4fuBdjrGjjZS84IJrmr3vST5JMYJvW84dBwB3ts4lSHBY E2Dlh5R/r5pJnKtca9WYYOeAf0D9P21fTj6bcz8Yt1La5l3UQaI+iByeEKdt1zQfFgQfbIXY sjDL579ZZoOIeE+lmDuHrZCuVM+7nlmnTu7eHzt8/iwPVNyjlauQrAZLEDGUOk96K6VyOk+2 4cCb5XUo/mzveuXX8U2zWLxBQxVRZTYLcqvwyCySgJlClA+cI3GI6SIqY7Ng6Q/w8xoeh7gp xlRoHNwxlvlnmHgIg6XcH1lY76Hdc8h9i9hYnd8Zw7xgyVLjWOTAEE3LcNfkV4Pr7UL8BKJZ 6NdJ5Xo7gpnE2yvF8shgWnV89U5KUXDafOmNCu5ejkvF6OMtCSSkuIIijDHrXFUZgLu7JNWi +T5imvzHMpSLyw/XZ2+QK/+kDuMUY01xbsas73geYIIJi0BMeFCdkTMsxPAC5tTdkyTl2HDj lf+7NVxjbClnrLZOeLh3Mish4yoD/F/DgxdGWza5qyxLi7U4iyoxooobQpCVW21uLrc9Prwa ONL4ev7NfFbzl9Gv5AlS+RgzL4k5suprLhfl1w2EHLOZlWtK7VhPnjZgpUf6vwTnudU6VmsR 0aC2thGIrHVasnrJ0EceVg+ZeOZ2PBKxjSLtaYpIF/37TNc9aacVRkAJAGFjSFQdeMnMI4sz eo7ltQR7giz1kgjPtqc13gG/GWQNH0QFa4gs8hCUoPsjwMqzHBEYIDdVXCqsM3eNY0UPxBzc DGOhafEi7BN/Wb4ciI+RSrXwO5QpZUSoxQWnlUMEEuEx4jejfgt0RwPrTluFlZJzg9K2v5YM 3RwMxEnPr2H+jpliZQRX22oHA0dVhSV9laolgkMnWzdCUKpSnbMPCs2PuPUpBIV9GdVfz56+ rCEyTm6DWa2LZ+phiZiC1R4r/HDTMBq8lyQkc+qKM2JAp0mbGe3maSpf2cJ90PqDM5ZaJcrf gW2EDKcsZHGCBM=
- Ironport-hdrordr: A9a23:TASrlaijH/1iBnMCCywPWDfb0HBQX0Z13DAbv31ZSRFFG/FwyP rBoB1L73DJYWgqNE3I+erhBEGBKUmsk6KdxbNhQItKOzOWxFdATbsSl7cKpgeAJ8SQzJ856U 4NSdkbNDS0NykEsS+Y2njJLz9D+qj+zEnAv463pB0BPGIaCdAS0+46MHfhLqQffng2OXNTLu vk2iMonUvGRZxBBf7LeEXtEtKz6uHjpdbDW1orFhQn4A6BgXeB76P7KQGR2lM7XylUybkv3G DZm0ihj5/T/M2T+1v57Sv+/p5WkNzuxp9qA9GNsNEcLnHJhhyzbIpsdrWetHQeof2p6nwtjN 7Qyi1Qc/hb2jf0RCWYsBHt0w7v3HIH7GLj80aRhT/ZrcnwVFsBeoJ8rLMcViGcx1srvdl63q 4O9XmerYBrARTJmzm4z8TUVjlx/3DE4UYKoKo2tThyQIEeYLheocg050VOCqoNGyr89cQODP RuNsfB//xbGGnqLkwxhlMfguBEY05DWytvGiM5y4ioOnlt7T5EJnIjtY8idixqzuN7d3FGj9 60e5iA2os+CPP+VpgNcdvpd/HHfFAlcSi8Ql56Hm6XYJ3vG0i94KIfs49Frt1DRvQzvewPcd L6IQpliVI=
- Ironport-sdr: DgHiUFgs+7zIGXMUdNZH+0wbZFoPWPvmH382QJiAwIbIdHtsjA18CCcPw3aSPdjeu6l4mr/2to D5NiutJwanj9Bo7+uut/bI2z76Aw+kxAnCZyZaFG15qOv+gG3qxtkhAmewrZ+qzSi0EBIK+irC SWTRRvGcfxqHwiF3WTVTw8uI6C9Wt2pMsObIlCfKhILwKS+DFMM1wFltvAuM8VJcXhelwqhPVL 2Nr2hugwu10qhYFbxUSs/0xViYvq0fld4KG388cpDB9L0Qmk1ISQeABNtz41CLXP5MtTUMfrOF APBke8II/diKMGzT3xCM7vi2
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Wed, Oct 27, 2021 at 02:06:40PM +0000, Oleksandr Andrushchenko wrote:
>
>
> On 27.10.21 16:23, Roger Pau Monné wrote:
> > On Wed, Oct 27, 2021 at 11:59:47AM +0000, Oleksandr Andrushchenko wrote:
> >> Hi, Roger!
> >>
> >> On 27.10.21 13:17, Oleksandr Andrushchenko wrote:
> >>> Hi, Roger!
> >>>
> >>> On 13.10.21 16:51, Roger Pau Monné wrote:
> >>>> On Thu, Sep 30, 2021 at 10:52:15AM +0300, Oleksandr Andrushchenko wrote:
> >>>>> From: Oleksandr Andrushchenko <oleksandr_andrushchenko@xxxxxxxx>
> >>>>>
> >>>>> This is in preparation for dynamic assignment of the vPCI register
> >>>>> handlers depending on the domain: hwdom or guest.
> >>>>> The need for this step is that it is easier to have all related
> >>>>> functionality
> >>>>> put at one place. When the subsequent patches add decisions on which
> >>>>> handlers to install, e.g. hwdom or guest handlers, then this is easily
> >>>>> achievable.
> >>>> Won't it be possible to select the handlers to install in init_bars
> >>>> itself?
> >>> It is possible
> >>>> Splitting it like that means you need to iterate over the numbers of
> >>>> BARs twice (one in add_bar_handlers and one in init_bars), which makes
> >>>> it more likely to introduce errors or divergences.
> >>>>
> >>>> Decoupling the filling of vpci_bar data with setting the handlers
> >>>> seems slightly confusing.
> >>> Ok, I won't introduce add_bar_handlers, thus rendering this patch useless.
> >>> I'll drop it and re-work the upcoming patches with this respect
> >> On the other hand after thinking a bit more.
> >> What actually init_bars do?
> >> 1. Runs once per each pdev (__init?)
> >> 2. Sizes the BARs and detects their type, sets up pdev->vpci->header BAR
> >> values
> >> 3. Adds register handlers.
> >>
> >> For DomU we only need 3), so we can setup guest handlers.
> > I think you assume that there will always be a hardware domain with
> > vPCI enabled that will get the device assigned and thus init_bars will
> > be executed prior to assigning to a domU.
> Yes, this is the current assumption...
> >
> > But what about dom0less,
> it was decided to put dom0less out of scope for now
> > or when using a classic PV dom0?
> I thought that vPCI is only used for PVH Dom0 and it is enough for now
> (yes, this is a weak argument, but we do not want PCI passthrough on Arm
> to become a never ending game... since 2015...)
I understand that not everything will be supported, that's perfectly
fine, but we should aim to not make supporting those use cases
harder in the future.
> > In that case
> > the device won't get assigned to a hardware domain with vPCI support,
> > so the vpci structure won't be allocated or filled,
> Yes, this is true. But because of the 3 functionflities of the init_bars is
> doing it might still need some dis-aggregation, e.g. BAR sizing
> is not needed and might not be possible while assigning to a DomU.
> So, I think that init_bars will need to be split in any case.
I understand that BAR sizing will not be needed if the structure is
pre-initialized, but I also cannot see why it would be impossible, at
least on x86.
> > and hence
> > init_bars would have to be executed when assigning to a domU.
> Please see above: not sure init_bars can exist in its form to achieve that.
> One of the steps this patch is doing is we split init_bars into
> a) register assignment
> b) all the reset: initial pdev's header initialization, sizing etc.
>
> The same is true for MSI/MSI-X. When we add support for MSI/MSI-X on Arm
> you will see the same: we need to split [1] (this is WIP).
>
> So, I am still convinced that we need add_bar_handlers in some form.
I'm fine to split it if there's a hard requirement, but I'm afraid so
far I'm not convinced it's required. Maybe if you could elaborate on
why BAR sizing might not be possible when assigning to domU I could be
convinced.
Another option might be to just modify init_bars to have slightly
different paths for dom0 vs domU.
Thanks, Roger.
|