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Re: PVH dom0 and MSIX memory mapping issue


  • To: Alex Olson <this.is.a0lson@xxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Fri, 25 Feb 2022 15:22:59 +0100
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  • Delivery-date: Fri, 25 Feb 2022 14:23:06 +0000
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On 25.02.2022 14:50, Alex Olson wrote:
> I realize PVH for dom0 is still experimental, but was trying to see how well 
> it
> works in the state of "master".
> 
> I found one issue with MSI-X interrupts in dom0 -- a fatal page fault occurs
> when the MSI-X PBA is accessed from dom0.  It looks like dom0 doesn't have an
> identity mapping for the PBA of a PCI device --  intentionally caused by
> vpci_make_msix_hole() ?   
> 
> I was also wondering, what is the impact of "existing mapping (...) at 0
> clobbers MSIX MMIO area".
> 
> Is the purpose of vpci_make_msix_hole() to make MSIX table/PBA accesses trap 
> to
> the hypervisor?  Seems like the page-based granularity is too coarse since the
> PBA can be much smaller than a page as well as not aligned... 
> 
> I was able to get something potentially usable by adding a "ioremap" call in
>  msix_read() and msix_write to deal with the access of the PBA.  Wasn't sure 
> if
> this was a proper way of handling things...  Was also wondering if it would 
> make
> sense to do the same for the "clobbers MSIX MMIO area" cases too.

You happen to ask just over two hours after a patch was posted:
https://lists.xen.org/archives/html/xen-devel/2022-02/msg01657.html
Since Roger didn't have an environment to test his change, maybe you
could do so, offering a Tested-by if successful?

Jan




 


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