Re: [PATCH v2 3/4] arm: add ISAR2, MMFR0 and MMFR1 fields in cpufeature

[Stefano Stabellini <sstabellini@xxxxxxxxxx>]

On Tue, 31 May 2022, Bertrand Marquis wrote:
> Complete AA64ISAR2 and AA64MMFR[0-1] with more fields.
> While there add a comment for MMFR bitfields as for other registers in
> the cpuinfo structure definition.
> 
> Signed-off-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
> ---
> Changes in v2:
> - patch introduced to isolate changes in cpufeature.h
> - complete MMFR0 and ISAR2 to sync with sysregs.h status
> ---
>  xen/arch/arm/include/asm/cpufeature.h | 28 ++++++++++++++++++++++-----
>  1 file changed, 23 insertions(+), 5 deletions(-)
> 
> diff --git a/xen/arch/arm/include/asm/cpufeature.h 
> b/xen/arch/arm/include/asm/cpufeature.h
> index 9649a7afee..57eb6773d3 100644
> --- a/xen/arch/arm/include/asm/cpufeature.h
> +++ b/xen/arch/arm/include/asm/cpufeature.h
> @@ -234,6 +234,7 @@ struct cpuinfo_arm {
>      union {
>          register_t bits[3];
>          struct {
> +            /* MMFR0 */
>              unsigned long pa_range:4;
>              unsigned long asid_bits:4;
>              unsigned long bigend:4;
> @@ -242,18 +243,31 @@ struct cpuinfo_arm {
>              unsigned long tgranule_16K:4;
>              unsigned long tgranule_64K:4;
>              unsigned long tgranule_4K:4;
> -            unsigned long __res0:32;
> -
> +            unsigned long tgranule_16k_2:4;
> +            unsigned long tgranule_64k_2:4;
> +            unsigned long tgranule_4k:4;

Should be tgranule_4k_2:4


> +            unsigned long exs:4;
> +            unsigned long __res0:8;
> +            unsigned long fgt:4;
> +            unsigned long ecv:4;
> +
> +            /* MMFR1 */
>              unsigned long hafdbs:4;
>              unsigned long vmid_bits:4;
>              unsigned long vh:4;
>              unsigned long hpds:4;
>              unsigned long lo:4;
>              unsigned long pan:4;
> -            unsigned long __res1:8;
> -            unsigned long __res2:28;
> +            unsigned long specsei:4;
> +            unsigned long xnx:4;
> +            unsigned long twed:4;
> +            unsigned long ets:4;
> +            unsigned long __res1:4;

hcx?


> +            unsigned long afp:4;
> +            unsigned long __res2:12;

ntlbpa
tidcp1
cmow

>              unsigned long ecbhb:4;

Strangely enough I am looking at DDI0487H and ecbhb is not there
(D13.2.65). Am I looking at the wrong location?


> +            /* MMFR2 */
>              unsigned long __res3:64;
>          };
>      } mm64;
> @@ -297,7 +311,11 @@ struct cpuinfo_arm {
>              unsigned long __res2:8;
>  
>              /* ISAR2 */
> -            unsigned long __res3:28;
> +            unsigned long wfxt:4;
> +            unsigned long rpres:4;
> +            unsigned long gpa3:4;
> +            unsigned long apa3:4;
> +            unsigned long __res3:12;

mops
bc
pac_frac


>              unsigned long clearbhb:4;

And again this is not described at D13.2.63. Probably the bhb stuff
didn't make it into the ARM ARM yet.


>  
>              unsigned long __res4:32;
> -- 
> 2.25.1
>