[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
- To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Fri, 10 Jun 2022 09:26:45 +0200
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=CUi+/aZOqk6Pk2CluuFgLnlx0BJ86/N14ldIJ05RjQA=; b=EblOnEHW6lgnDKjgHeZraMEttlhHcwFJhQ+nezDLTjk5HonLYdEwOHZtxApEchHJApVLLjPKfBBCKArF1mxOpKEsdMfpCcloWWVx187NKsyrPkTckx0jr9Fj2Ldp9KnlascCNeNtsenB+Misqxc3DMDJuYfFZaC7N1Vo5WBt0MPPulczLIl9rRVKACyy5gXmSJvLVASYDERzo+5Kh1pxzL7gG6Wd8mGRfyoKd11g3PmFUuLoCJ+G2bVR/bK6SH9UW7FDAPC0ycKG7ut9Vl57Rg+6ZEmUCPwEF7FJLIKrTRJUh5e7xiPGmYCCKdp+067kpr/dFdS5CP21cLOt6w5CJg==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BqXZusYFeC2YU9uxhk7Mndq1NH99RvYYZKpRuyAe+fYj8UkXBJcH/SjDSmzygqPayYTb5UeaWhb/vL6Wdgusoh4Muinc7HhesY20x+1N8OBV4s+YFnlzKThSrT+fSo50JbNMjVwL5khU82mUn/1xfjqcbX3hfjAK1rJsIZSA+b2++zLpu2bDyvlNicNwZ0WK59yiTsetUoX6a1q1citI12AkqG+NlPjTZtBYP0VOby1mBhFn46W+T4yp0eJjz30mryRpsDzeKg/gi7pinPINuYzAC/dLzy9jMLosEeUvTeHfMyLz+lPbJ/xOh/2MkzpqVcBFXwNnS3No3sMuy7eWWw==
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Delivery-date: Fri, 10 Jun 2022 07:26:56 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
reaches zero, it'll be retained as long as the type refcount is non-
zero. Hence any checking against the requested type needs to either zap
the bit from the type or include it in the used mask.
Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
The check around the TLB flush which was moved for XSA-401 also looks to
needlessly trigger a flush when "type" has the bit set (while "x"
wouldn't). That's no different from original behavior, but still looks
inefficient.
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2956,7 +2956,8 @@ static int _get_page_type(struct page_in
* The page is in one of two states (depending on PGT_partial),
* and should have exactly one reference.
*/
- ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+ ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+ (type | 1));
if ( !(x & PGT_partial) )
{
|
