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Re: [PATCH] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
- To: Jan Beulich <jbeulich@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- Date: Fri, 10 Jun 2022 08:12:42 +0000
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- Thread-topic: [PATCH] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
On 10/06/2022 08:26, Jan Beulich wrote:
> While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
> reaches zero, it'll be retained as long as the type refcount is non-
> zero. Hence any checking against the requested type needs to either zap
> the bit from the type or include it in the used mask.
>
> Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
pae_xen_l2 being outside of the typemask is deeply confusing to work
with. It also renders all of the comments trying to explain the
structure of this logic wrong.
I'm a little concerned with type usage in the non-coherent path too.
It's safe, but is (along side the IOMMU path) a misleading example to
surrounding code.
Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
I can't think of anything better to do in the short term.
> ---
> The check around the TLB flush which was moved for XSA-401 also looks to
> needlessly trigger a flush when "type" has the bit set (while "x"
> wouldn't). That's no different from original behavior, but still looks
> inefficient.
It's not the only inefficiency here. Still plenty of improvements to be
had in _get_page_type().
~Andrew
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