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RE: [PATCH RESEND v10 1/2] xen+tools: Report Interrupt Controller Virtualization capabilities on x86


  • To: Jane Malalane <Jane.Malalane@xxxxxxxxxx>, "Beulich, Jan" <JBeulich@xxxxxxxx>
  • From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
  • Date: Thu, 30 Jun 2022 02:15:22 +0000
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  • Cc: George Dunlap <George.Dunlap@xxxxxxxxxx>, Nick Rosbrook <rosbrookn@xxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Anthony Perard <anthony.perard@xxxxxxxxxx>, "Cooper, Andrew" <andrew.cooper3@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, "Gross, Jurgen" <jgross@xxxxxxxx>, Christian Lindig <christian.lindig@xxxxxxxxxx>, David Scott <dave@xxxxxxxxxx>, Pau Monné, Roger <roger.pau@xxxxxxxxxx>, "Nakajima, Jun" <jun.nakajima@xxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Thu, 30 Jun 2022 02:15:48 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Thread-index: AQHYi8Ai6ihqZv9P00+2HZAdh00G3K1mcQoAgAAN4ACAALfGIA==
  • Thread-topic: [PATCH RESEND v10 1/2] xen+tools: Report Interrupt Controller Virtualization capabilities on x86

> From: Jane Malalane <Jane.Malalane@xxxxxxxxxx>
> Sent: Wednesday, June 29, 2022 11:17 PM
> 
> On 29/06/2022 15:26, Jan Beulich wrote:
> > On 29.06.2022 15:55, Jane Malalane wrote:
> >> Add XEN_SYSCTL_PHYSCAP_X86_ASSISTED_XAPIC and
> >> XEN_SYSCTL_PHYSCAP_X86_ASSISTED_X2APIC to report accelerated xAPIC
> and
> >> x2APIC, on x86 hardware. This is so that xAPIC and x2APIC virtualization
> >> can subsequently be enabled on a per-domain basis.
> >> No such features are currently implemented on AMD hardware.
> >>
> >> HW assisted xAPIC virtualization will be reported if HW, at the
> >> minimum, supports virtualize_apic_accesses as this feature alone means
> >> that an access to the APIC page will cause an APIC-access VM exit. An
> >> APIC-access VM exit provides a VMM with information about the access
> >> causing the VM exit, unlike a regular EPT fault, thus simplifying some
> >> internal handling.
> >>
> >> HW assisted x2APIC virtualization will be reported if HW supports
> >> virtualize_x2apic_mode and, at least, either apic_reg_virt or
> >> virtual_intr_delivery. This also means that
> >> sysctl follows the conditionals in vmx_vlapic_msr_changed().
> >>
> >> For that purpose, also add an arch-specific "capabilities" parameter
> >> to struct xen_sysctl_physinfo.
> >>
> >> Note that this interface is intended to be compatible with AMD so that
> >> AVIC support can be introduced in a future patch. Unlike Intel that
> >> has multiple controls for APIC Virtualization, AMD has one global
> >> 'AVIC Enable' control bit, so fine-graining of APIC virtualization
> >> control cannot be done on a common interface.
> >>
> >> Suggested-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> >> Signed-off-by: Jane Malalane <jane.malalane@xxxxxxxxxx>
> >> Reviewed-by: "Roger Pau Monné" <roger.pau@xxxxxxxxxx>
> >> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
> >> Reviewed-by: Anthony PERARD <anthony.perard@xxxxxxxxxx>
> >
> > Could you please clarify whether you did drop Kevin's R-b (which, a
> > little unhelpfully, he provided in reply to v9 a week after you had
> > posted v10) because of ...
> >
> >> v10:
> >>   * Make assisted_x{2}apic_available conditional upon _vmx_cpu_up()
> >
> > ... this, requiring him to re-offer the tag? Until told otherwise I
> > will assume so.
> 
> It wasn't intentional but yes, that is right. There was a change, albeit
> minor, in vmx from v9 to v10 so I do require Kevin Tian or Jun Nakajima
> to review it.
> 

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>

 


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