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Re: [PATCH v2 2/2] x86/spec-ctrl: Knobs for STIBP and PSFD, and follow hardware STIBP hint
- To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Thu, 30 Jun 2022 18:40:37 +0200
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- Cc: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Thu, 30 Jun 2022 16:40:51 +0000
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Wed, Jun 29, 2022 at 07:45:08PM +0100, Andrew Cooper wrote:
> STIBP and PSFD are slightly weird bits, because they're both implied by other
> bits in MSR_SPEC_CTRL. Add fine grain controls for them, and take the
> implications into account when setting IBRS/SSBD.
>
> Rearrange the IBPB text/variables/logic to keep all the MSR_SPEC_CTRL bits
> together, for consistency.
>
> However, AMD have a hardware hint CPUID bit recommending that STIBP be set
> unilaterally. This is advertised on Zen3, so follow the recommendation.
> Furthermore, in such cases, set STIBP behind the guest's back for now. This
> has negligible overhead for the guest, but saves a WRMSR on vmentry. This is
> the only default change.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
Thanks, Roger.
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