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[XEN v5 06/11] xen/Arm: vGICv3: Fix emulation of ICC_SGI1R on AArch32
- To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
- Date: Mon, 5 Dec 2022 13:26:32 +0000
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- Cc: <sstabellini@xxxxxxxxxx>, <stefanos@xxxxxxxxxx>, <julien@xxxxxxx>, <Volodymyr_Babchuk@xxxxxxxx>, <bertrand.marquis@xxxxxxx>, <michal.orzel@xxxxxxx>, <jgrall@xxxxxxxxxx>, <burzalodowa@xxxxxxxxx>, "Ayan Kumar Halder" <ayan.kumar.halder@xxxxxxx>
- Delivery-date: Mon, 05 Dec 2022 14:51:44 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
Refer Arm IHI 0069H ID020922, 12.5.23, ICC_SGI1R is a 64 bit register on
AArch32 systems. Thus, the function needs to change to reflect this.
The reason being 'register_t' is defined as 'u32' on AArch32.
Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>
Acked-by: Julien Grall <jgrall@xxxxxxxxxx>
---
Changes from :-
v1 - 1. Updated the commit message.
v2 - 1. No changes.
v3 - 1. No changes.
v4 - 1. No changes.
xen/arch/arm/vgic-v3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index e0b636b95f..47575d4944 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1483,7 +1483,7 @@ write_reserved:
return 1;
}
-static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
+static bool vgic_v3_to_sgi(struct vcpu *v, uint64_t sgir)
{
int virq;
int irqmode;
--
2.17.1
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