[XEN v5 00/11] Arm: Enable GICv3 for AArch32

[Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>]

Hi All,

Please find the following patches to enable GICv3 for AArch32.
This is a pre-requisite to support Xen on Cortex-R52 (AArch32-v8R system)

Let me know your thoughts.


Changes from -

v1 :-
1. Updated in the changelog for each of the patches.

v2 :-
1. Dropped "xen/Arm: GICv3: Move the macros to compute the affnity level to
arm64/arm32". The reason being aff3 does not exist on arm32. And aff0..2 is
the same between arm32, AArch32 and AArch64.

2. Introduce a new patch "xen/Arm: GICv3: Adapt access to VMPIDR register for
AArch32".

3. For the new registers introduced, we have defined the arm32 name and then
an alias.

4. Use 'AArch32' across all the patches.

5. Dropped the 'R-b' and 'Ack' in "[XEN v3 08/12] xen/Arm: GICv3: Define
ICH_AP0R<n> and ICH_AP1R<n> for AArch32".

v3 :-
1. "xen/Arm: GICv3: Use ULL instead of UL for 64bits" has been dropped.
The change has been merged with "xen/Arm: GICv3: Define ICH_LR<n>_EL2 on 
AArch32".

2. I have marked the patches which have been Rb + Ack vs Rb only.

3. Dropped Rb from "xen/Arm: GICv3: Enable GICv3 for AArch32"

v4 :-
1. The first six patches have been reviewed and acked.
2. Dropped "Rb michal.orzel@xxxxxxx" from patches 7/11, 8/11.
5. Kept "Rb michal.orzel@xxxxxxx" on patch 11/11 as the change seemed trivial.

Ayan Kumar Halder (11):

These patches have been reviewed and acked, so the reviewer may choose to 
ignore :-
  xen/Arm: vGICv3: Sysreg emulation is applicable for AArch64 only
  xen/Arm: GICv3: Do not calculate affinity level 3 for AArch32
  xen/Arm: vreg: Support vreg_reg64_* helpers on AArch32
  xen/Arm: vGICv3: Adapt emulation of GICR_TYPER for AArch32
  xen/Arm: GICv3: Fix GICR_{PENDBASER, PROPBASER} emulation on 32-bit
    host
  xen/Arm: vGICv3: Fix emulation of ICC_SGI1R on AArch32

These patches are yet to be reviewed and acked :-
  xen/Arm: GICv3: Define ICH_LR<n>_EL2 on AArch32
  xen/Arm: GICv3: Define ICH_AP0R<n> and ICH_AP1R<n> for AArch32
  xen/Arm: GICv3: Define macros to read/write 64 bit

These patches are yet to be acked :-
  xen/Arm: GICv3: Define remaining GIC registers for AArch32
  xen/Arm: GICv3: Enable GICv3 for AArch32

 SUPPORT.md                               |   7 ++
 xen/arch/arm/Kconfig                     |   9 +-
 xen/arch/arm/gic-v3.c                    | 153 ++++++++++++-----------
 xen/arch/arm/include/asm/arm32/io.h      |  20 +++
 xen/arch/arm/include/asm/arm32/sysregs.h |  19 +++
 xen/arch/arm/include/asm/arm64/io.h      |   2 +
 xen/arch/arm/include/asm/arm64/sysregs.h |   5 +
 xen/arch/arm/include/asm/cpregs.h        | 134 ++++++++++++++++++++
 xen/arch/arm/include/asm/cpufeature.h    |   1 +
 xen/arch/arm/include/asm/gic_v3_defs.h   |  24 ++--
 xen/arch/arm/include/asm/vreg.h          |  86 +++----------
 xen/arch/arm/vgic-v3.c                   |  22 +++-
 12 files changed, 322 insertions(+), 160 deletions(-)

-- 
2.17.1