[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v1 04/14] xen/riscv: add <asm/csr.h> header



On Sat, Jan 21, 2023 at 1:00 AM Oleksii Kurochko
<oleksii.kurochko@xxxxxxxxx> wrote:
>
> Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>

Reviewed-by: Alistair Francis <alistair.francis@xxxxxxx>

Alistair

> ---
>  xen/arch/riscv/include/asm/csr.h | 82 ++++++++++++++++++++++++++++++++
>  1 file changed, 82 insertions(+)
>  create mode 100644 xen/arch/riscv/include/asm/csr.h
>
> diff --git a/xen/arch/riscv/include/asm/csr.h 
> b/xen/arch/riscv/include/asm/csr.h
> new file mode 100644
> index 0000000000..1a879c6c4d
> --- /dev/null
> +++ b/xen/arch/riscv/include/asm/csr.h
> @@ -0,0 +1,82 @@
> +/*
> + * Take from Linux.
> + *
> + * SPDX-License-Identifier: GPL-2.0-only
> + *
> + * Copyright (C) 2015 Regents of the University of California
> + */
> +
> +#ifndef _ASM_RISCV_CSR_H
> +#define _ASM_RISCV_CSR_H
> +
> +#include <asm/asm.h>
> +#include <xen/const.h>
> +#include <asm/riscv_encoding.h>
> +
> +#ifndef __ASSEMBLY__
> +
> +#define csr_read(csr)                                          \
> +({                                                             \
> +       register unsigned long __v;                             \
> +       __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr)        \
> +                             : "=r" (__v) :                    \
> +                             : "memory");                      \
> +       __v;                                                    \
> +})
> +
> +#define csr_write(csr, val)                                    \
> +({                                                             \
> +       unsigned long __v = (unsigned long)(val);               \
> +       __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0"     \
> +                             : : "rK" (__v)                    \
> +                             : "memory");                      \
> +})
> +
> +/*
> +#define csr_swap(csr, val)                                     \
> +({                                                             \
> +       unsigned long __v = (unsigned long)(val);               \
> +       __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
> +                             : "=r" (__v) : "rK" (__v)         \
> +                             : "memory");                      \
> +       __v;                                                    \
> +})
> +
> +#define csr_read_set(csr, val)                                 \
> +({                                                             \
> +       unsigned long __v = (unsigned long)(val);               \
> +       __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
> +                             : "=r" (__v) : "rK" (__v)         \
> +                             : "memory");                      \
> +       __v;                                                    \
> +})
> +
> +#define csr_set(csr, val)                                      \
> +({                                                             \
> +       unsigned long __v = (unsigned long)(val);               \
> +       __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0"     \
> +                             : : "rK" (__v)                    \
> +                             : "memory");                      \
> +})
> +
> +#define csr_read_clear(csr, val)                               \
> +({                                                             \
> +       unsigned long __v = (unsigned long)(val);               \
> +       __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
> +                             : "=r" (__v) : "rK" (__v)         \
> +                             : "memory");                      \
> +       __v;                                                    \
> +})
> +
> +#define csr_clear(csr, val)                                    \
> +({                                                             \
> +       unsigned long __v = (unsigned long)(val);               \
> +       __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0"     \
> +                             : : "rK" (__v)                    \
> +                             : "memory");                      \
> +})
> +*/
> +
> +#endif /* __ASSEMBLY__ */
> +
> +#endif /* _ASM_RISCV_CSR_H */
> --
> 2.39.0
>
>



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.