Re: [PATCH 2/2] x86/spec-ctrl: Enumerations for DDP controls

[Jan Beulich <jbeulich@xxxxxxxx>]

On 10.03.2023 17:02, Andrew Cooper wrote:
> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/data-dependent-prefetcher.html
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

In the cover letter you mention that we should enable use of this by guests.
Perhaps also mention this here?

> --- a/xen/arch/x86/include/asm/msr-index.h
> +++ b/xen/arch/x86/include/asm/msr-index.h
> @@ -41,6 +41,7 @@
>  #define  SPEC_CTRL_RRSBA_DIS_U              (_AC(1, ULL) <<  5)
>  #define  SPEC_CTRL_RRSBA_DIS_S              (_AC(1, ULL) <<  6)
>  #define  SPEC_CTRL_PSFD                     (_AC(1, ULL) <<  7)
> +#define  SPEC_CTRL_DDPU_D                   (_AC(1, ULL) <<  8)

The doc calls this DDPD_U - typo, or do you happen to know that the doc has
it the wrong way round (and is going to be fixed)?

> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -295,6 +295,7 @@ XEN_CPUFEATURE(INTEL_PSFD,         13*32+ 0) /*A  
> MSR_SPEC_CTRL.PSFD */
>  XEN_CPUFEATURE(IPRED_CTRL,         13*32+ 1) /*   MSR_SPEC_CTRL.IPRED_DIS_* 
> */
>  XEN_CPUFEATURE(RRSBA_CTRL,         13*32+ 2) /*   MSR_SPEC_CTRL.RRSBA_DIS_* 
> */
>  XEN_CPUFEATURE(BHI_CTRL,           13*32+ 4) /*   MSR_SPEC_CTRL.BHI_DIS_S */
> +XEN_CPUFEATURE(DDP_CTRL,           13*32+ 3) /*   MSR_SPEC_CTRL.DDPU_U */
>  XEN_CPUFEATURE(MCDT_NO,            13*32+ 5) /*A  MCDT_NO */

Looks like an off-by-1 in where you add the new line.

Suitably adjusted
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>

Jan