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[PATCH v2 0/3] hvm: add hvm_funcs hooks for msr intercept handling


  • To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Xenia Ragiadakou <xenia.ragiadakou@xxxxxxx>
  • Date: Mon, 24 Apr 2023 11:20:35 +0300
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  • Cc: Xenia Ragiadakou <xenia.ragiadakou@xxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Jun Nakajima <jun.nakajima@xxxxxxxxx>, Kevin Tian <kevin.tian@xxxxxxxxx>
  • Delivery-date: Mon, 24 Apr 2023 08:21:25 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

This patch series aims to make the msr intercept handling, performed in
vpmu code, virtualization technology agnostic.
It creates a common interface for setting/clearing the msr intercepts and
then add hooks to the corresponding hvm_funcs table to be able to call the
svm/vmx specific handlers through a generic hvm wrapper function.

Version 2 addresses the comments made on version 1 to ease further review.

Still there is a pending question made by Jan, whether there could be other,
than the vpmu one, use cases that would require msr intercept handling to be
performed outside of virtualization techonology-specific code, and whether
this abstraction is actually usefull to have.

Xenia Ragiadakou (3):
  x86/svm: split svm_intercept_msr() into
    svm_{set,clear}_msr_intercept()
  x86/vmx: replace enum vmx_msr_intercept_type with the msr access flags
  x86/hvm: create hvm_funcs for {svm,vmx}_{set,clear}_msr_intercept()

 xen/arch/x86/cpu/vpmu_amd.c             |  9 +--
 xen/arch/x86/cpu/vpmu_intel.c           | 24 ++++----
 xen/arch/x86/hvm/svm/svm.c              | 75 ++++++++++++++++---------
 xen/arch/x86/hvm/vmx/vmcs.c             | 40 ++++++-------
 xen/arch/x86/hvm/vmx/vmx.c              | 46 +++++++--------
 xen/arch/x86/include/asm/hvm/hvm.h      | 34 +++++++++++
 xen/arch/x86/include/asm/hvm/svm/vmcb.h | 15 ++---
 xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 16 ++----
 8 files changed, 155 insertions(+), 104 deletions(-)

-- 
2.34.1




 


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