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Re: [PATCH 1/3] x86: Add bit definitions for Automatic IBRS


  • To: Alejandro Vallejo <alejandro.vallejo@xxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Fri, 26 May 2023 17:46:51 +0100
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  • Cc: Wei Liu <wl@xxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Juergen Gross <jgross@xxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
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  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 26/05/2023 4:00 pm, Alejandro Vallejo wrote:
> This is AMD's version of Intel's Enhanced IBRS. Exposed in CPUID
> and toggled in EFER.

AIBRS and EIBRS are very much not the same, and I argued hard to not
have Linux confuse the too, but alas.

Don't mention EIBRS at all.

Simply "Auto IBRS is a new feature in AMD Zen4 CPUs and late, intended
to reduce the overhead involved with operating IBRS", or something along
these lines.

> diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c
> index 5d0c64a45f..e487885a5c 100644
> --- a/tools/misc/xen-cpuid.c
> +++ b/tools/misc/xen-cpuid.c
> @@ -200,6 +200,8 @@ static const char *const str_e21a[32] =
>      [ 2] = "lfence+",
>      [ 6] = "nscb",
>  
> +    [ 8] = "auto-ibrs",
> +

This wants to be:

     [ 6] = "nscb",
+    [ 8] = "auto-ibrs",

as they are adjacent with names in two columns.  Gaps are only for
discontinuities in numbering.

> diff --git a/xen/include/public/arch-x86/cpufeatureset.h 
> b/xen/include/public/arch-x86/cpufeatureset.h
> index 777041425e..e3952f62bc 100644
> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -287,6 +287,7 @@ XEN_CPUFEATURE(AVX_IFMA,     10*32+23) /*A  AVX-IFMA 
> Instructions */
>  /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */
>  XEN_CPUFEATURE(LFENCE_DISPATCH,    11*32+ 2) /*A  LFENCE always serializing 
> */
>  XEN_CPUFEATURE(NSCB,               11*32+ 6) /*A  Null Selector Clears Base 
> (and limit too) */
> +XEN_CPUFEATURE(AUTOMATIC_IBRS,     11*32+ 8) /*   HW can handle IBRS on its 
> own */

Were possible, we want to use the same names.  AUTO_IBRS is fine here,
and shorter to use throughout Xen.

Furthermore, it must match the cpu_has_* name, and that's already in the
better form.

~Andrew



 


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