Re: [PATCH 1/3] x86: Add bit definitions for Automatic IBRS

[Alejandro Vallejo <alejandro.vallejo@xxxxxxxxx>]

On Fri, May 26, 2023 at 05:46:51PM +0100, Andrew Cooper wrote:
> AIBRS and EIBRS are very much not the same, and I argued hard to not
> have Linux confuse the too, but alas.
> 
> Don't mention EIBRS at all.
> 
> Simply "Auto IBRS is a new feature in AMD Zen4 CPUs and late, intended
> to reduce the overhead involved with operating IBRS", or something along
> these lines.
Sure. I did go out of my way to avoid ambiguityin the code, but it's true
the commit message is unfortunate.

> 
> > diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c
> > index 5d0c64a45f..e487885a5c 100644
> > --- a/tools/misc/xen-cpuid.c
> > +++ b/tools/misc/xen-cpuid.c
> > @@ -200,6 +200,8 @@ static const char *const str_e21a[32] =
> >      [ 2] = "lfence+",
> >      [ 6] = "nscb",
> >  
> > +    [ 8] = "auto-ibrs",
> > +
> 
> This wants to be:
> 
>      [ 6] = "nscb",
> +    [ 8] = "auto-ibrs",
> 
> as they are adjacent with names in two columns.  Gaps are only for
> discontinuities in numbering.
>
> [...]
>
> Were possible, we want to use the same names.  AUTO_IBRS is fine here,
> and shorter to use throughout Xen.
Sure to both.

Alejandro