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RE: [PATCH 8/9] xen/arm: Allow the user to build Xen with USBAN
- To: Julien Grall <julien@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Henry Wang <Henry.Wang@xxxxxxx>
- Date: Thu, 29 Jun 2023 01:36:15 +0000
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- Cc: Luca Fancellu <Luca.Fancellu@xxxxxxx>, "michal.orzel@xxxxxxx" <michal.orzel@xxxxxxx>, Julien Grall <jgrall@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Delivery-date: Thu, 29 Jun 2023 01:36:54 +0000
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- Thread-topic: [PATCH 8/9] xen/arm: Allow the user to build Xen with USBAN
Hi Julien,
> -----Original Message-----
> Subject: Re: [PATCH 8/9] xen/arm: Allow the user to build Xen with USBAN
>
> On 26/06/2023 08:29, Henry Wang wrote:
> > Hi Julien,
> Hi Henry,
>
> > Reviewed-by: Henry Wang <Henry.Wang@xxxxxxx>
>
> Thanks, I will fix both typos.
Great, thanks!
>
> >
> > Just want to make sure you also noticed this, otherwise maybe you
> > can include another patch in the series to fix this?
>
> I haven't seen this one. Probably because you would need a setup where
> interrupts are around ID 1022.
I took a closer look today, I think the reason is from this device tree node
for the FVP:
ethernet@202000000 {
compatible = "smsc,lan91c111";
reg = <0x2 0x2000000 0x10000>;
interrupts = <0xf>;
};
The value 0xf is passed to vgic_get_virq_type() as "index" then "intr" in
VGIC_ICFG_MASK. Hence the 31 in
"(XEN) left shift of 1 by 31 places cannot be represented in type 'int'".
>
> Or I can do that
> > in case you don't have enough bandwidth.
>
> You have the setup to exercise the problem. So it would be best if you
> do it.
I've prepared below on top of your series:
-#define VGIC_ICFG_MASK(intr) (1 << ((2 * ((intr) % 16)) + 1))
+#define VGIC_ICFG_MASK(intr) (1U << ((2 * ((intr) % 16)) + 1))
If you think it is ok, I will send it out to the list after I double check our
CI will not complain about it. Thanks!
Kind regards,
Henry
>
> Cheers,
>
> --
> Julien Grall
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